Presentation on theme: "Serial Interface Dr. Esam Al_Qaralleh CE Department"— Presentation transcript:
1Serial Interface Dr. Esam Al_Qaralleh CE Department Design of Microprocessor-Based SystemsSerial InterfaceDr. Esam Al_QarallehCE DepartmentPrincess Sumaya University for Technology
2External Interface Two ways of interfacing I/O devices Serial Parallel CheaperSlowerParallelFasterData skewLimited to small distances
3External Interface (cont’d) Two basic modes of data transmission
4External Interface (cont’d) Serial transmissionAsynchronousEach byte is encoded for transmissionStart and stop bitsNo need for sender and receiver synchronizationSynchronousSender and receiver must synchronizeDone in hardware using phase locked loops (PLLs)Block of data can be sentMore efficientLess overhead than asynchronous transmissionExpensive
7External Interface (cont’d) EIA-232 serial interfaceLow-speed serial transmissionAdopted by Electronics Industry Association (EIA)Popularly known by its predecessor RS-232It uses a 9-pin connector DB-9Uses 8 signalsTypically used to connect a modem to a computer
8External Interface (cont’d) Transmission protocol uses three phasesConnection setupComputer A asserts DTE (Data Terminal Equipment) ReadyTransmits phone# via Transmit Data line (pin 2)Modem B alerts its computer via Ring Indicator (pin 9)Computer B asserts DTE Ready (pin 4)Modem B generates carrier and turns its DCE (Data Communication Equipment) ReadyModem A detects the carrier signal from modem BModem A alters its computer via Carrier Detect (pin 1)Turns its DCE ReadyData transmissionDone by handshaking usingrequest-to-send (RTS) and clear-to-send (CTS) signalsConnection terminationDone by deactivating RTS
9Serial Data Transfer Asynchronous v.s. Synchronous Asynchronous transfer does not require clock signal. However, it transfers extra bits (start bits and stop bits) during data communicationSynchronous transfer does not transfer extra bits. However, it requires clock signalFrameStartbitB0B1B2B3B4B5B6ParityStop bitsAsynchronousData transferdataclkSynchronousData transferdataB0B1B2B3B4B5Baud (Baud is # of bits transmitted/sec, including start, stop, data and parity).
13Programming 8251 8251 command register TxE: transmit enable EHIRRTSERSBRKRxEDTRTxEcommand registerTxE: transmit enableDTR: data terminal ready, DTR pin will be lowRxE: receiver enableSBPRK: send break character, TxD pin will be lowER: error resetRTS: request to send, CTS pin will be lowIR: internal resetEH: enter hunt mode
14Programming 8251 8251 status register TxRDY: transmit ready DSRSYNDETFEOEPETxEMPTYRxRDYTxRDYstatus registerTxRDY: transmit readyRxRDY: receiver readyTxEMPTY: transmitter emptyPE: parity errorOE: overrun errorFE: framing errorSYNDET: sync. character detectedDSR: data set ready
15Simple Serial I/O Procedures ReadstartCheck RxRDYIs it logic 1?Read data register*endYesNo* This clears RxRDYWriteCheck TxRDYWrite data register** This clears TxRDY
16ErrorsParity error: Received data has wrong error -- transmission bit flip due to noise.Framing error: Start and stop bits not in their proper places.This usually results if the receiver is receiving data at the incorrect baud rate. Overrun error: Data has overrun the internal receiver FIFO buffer.Software is failing to read the data from the FIFO.