1. Chess Review May 10, 2004 Berkeley, CA Platform-based Design for Mixed Analog-Digital Designs Fernando De Bernardinis, Yanmei Li, Alberto Sangiovanni-Vincentelli

2. Chess Review, May 10, 2004 Abstract A design methodology for system level analog design is proposed. Analog Platforms provide a new abstraction layer that allows fast while accurate evaluation of analog components at the system level. Analog Constraint Graphs (ACGs) are introduced to make the approach more efficient. The basic idea and design flow of Platform- based Analog Design are presented. A multi-stage amplifier design is discussed as a proof-of-concept example.

3. Chess Review, May 10, 2004 Analog Platform Definition Analog Platform Behavioral models Performance models Interconnection models Export non-idealities at system level Fast, reasonably accurate simulations for system exploration Built for Top-down use Constrain behavioral models to implementation architecture Accurate models obtained through bottom-up characterization of platform Model analog component composition Allow composing systems from APs maintaining performance accuracy Encapsulate analog components providing an abstraction level consistent with platform based design paradigm Implement function/communication/architecture mapping in the analog context Provide accurate performance estimation for optimization through constraints propagation

4. Chess Review, May 10, 2004 Analog Platform Design Paradigm Decouple circuit from system design Harness designer creativity exporting several circuit topologies at the system level Platforms do not solve circuit synthesis problem directly, they export circuits at system level System Requirements Architectural Space Given a circuit topology, performance characterization defines the platform architectural space Performance models allow selecting feasible points in the architectural space The framework is the same as for digital platforms  capture mixed signal designs System Specs System Design Matlab/Simulink, V-AMS, … Breakdown Requirements System Level Exploration Circuit design Size, Simulate and iterate Layout design Verify and iterate Circuit Sizing & Synthesis Analog Platform

5. Chess Review, May 10, 2004 Performance Models Performance models allow defining multiple levels of abstraction –Performance models map the architecture space I of level i into the architecture space O of level i+1 For a circuit platform i: –I is the set of n-tuples (I  R n ) {W1, W2, …, L1, L2, …, IB1, …, VB1,..} –O is the set of m-tuples (O  R m ) {Power, Gain, NF, IIP3, P -1dB, DR,…} –  : R n  R m is the AP Evaluation function analytical expressions, simplified simulations, Spice simulations A performance model is a relation P s.t. P(x)=1  x   ( I) I O 

6. Chess Review, May 10, 2004 Platform Characterization Performance models are approximated with Support Vector Machines (SVMs) n-dimensional functions that evaluate to {0,1}, 2D projection shown aside Characterization cost C  #sim · T sim  k dim(I) · T sim –Constrain  with Analog Constraint Graphs so that effective dimensionality is drastically reduced –Exploit ACGs to bias characterization A tool set is available to generate performance models IBIB W2W2 L2L2 W4W4 L4L4 V GS2 V GS4 22  M = W M /L M ½ ½

7. Chess Review, May 10, 2004 AP Flow: Bottom-up Phase Define the platform library for the system New topologies can be easily added and compared through the exploration-through optimization top-down flow Define behavioral model and P Select new topology Derive ACG and nominal configuration Generate P Select new topology Derive ACG and nominal configuration Generate P …

8. Chess Review, May 10, 2004 AP Design Flow: Top-down Phase Set a well defined design problem Build System with APs Define a formal set of conditions for feasibility Define an objective function for optimization Optimize system constraining behavioral models to their Optimize system constraining behavioral models to their  Run local optimization to meet requirements Refine/Add platforms Automatic exploration needs formal definition for working systems Optimize the system and refine the architectural blocks – Architectural exploration is performed Return optimal performances and candidate solutions

9. Chess Review, May 10, 2004 AP Design Example – Bottom up Multi-stage gm/gm wide-band amplifier Top-level design problem: –determine optimal configuration (#stages and gain distribution) so to minimize power First step: behavioral model Second step: Interconnection model (  C load ) Third step: Performance model +-+- +-+- n

10. Chess Review, May 10, 2004 AP Design Example – Top down Exploit Platforms for optimizing the system Formulate as an optimization problem at behavioral level Constrain instances with APs Perform optimization (SA) Return feasible specs and candidate instances n out