1. 1 On-chip networks for System-on-chips Embedded System Design Yuping Dong Shiva Navab

2. 2 SoC Communication Architectures: Background keywords Masters Slaves Channel Bridges Bus arbiters

3. 3 Currently used communication architectures on SoC Static Priority Based Shared Bus Time Division Multiplexing Access (TDMA) Shared Bus

4. Ref: Lottery Bus Paper4 Static Priority Based Shared Bus

5. Ref: Lottery Bus Paper5 TDMA Based Shared Bus

6. Ref: Lottery Bus Paper6 TDMA Based Shared Bus

7. 7 Problems with Other Architectures Static Priority Based Shared Bus lack of control over the allocation of communication bandwidth to different system components or data flows TDMA Based Shared Bus significant latencies resulting from variations in the time-profile of the communication requests

8. 8 Examples of High-Performance Communication Architecture for SoC Designs LotteryBus Sonics µNetwork

9. 9 LotteryBus A New High-Performance Communication Architecture for complex System-on-Chip Designs control over the fraction of communication bandwidth fast execution (low latencies)

10. Ref: Lottery Bus Paper10 LotteryBus

11. Ref: Lottery Bus Paper11 How it works The probability that bus is granted to C i : The probability that a task with t tickets can access the bus after n lottery drawings:

12. Ref: Lottery Bus Paper12 Lottery manager for static LOTTERYBUS architecture

13. Ref: Lottery Bus Paper13 Lottery manager for dynamic LOTTERYBUS architecture

14. Ref: Lottery Bus Paper14 Advantages of LotteryBus

15. 15 Sonics µ Network

16. Sonics INC16 Sonics Design Core Decoupling Unique arbitration mechanism

17. Sonics INC17 Overview of µNetwork

18. Sonics INC18 System Based on Sonics µNetwork

19. Sonics INC19 Sonics µNetwork Components

20. Sonics INC20 SiliconBackplane µNetwork (On-Chip Interconnect)

21. Sonics INC21 Open Core Protocol

22. 22 MultiChip µNetwork (Off-Chip Interconnect) Bandwidth Allocation Connects Integrated Signaling Mechanism

23. 23 Other Examples of Communication Architecture for SOC Designs AMBA Bus ARM-based microprocessors VSIA Bus Virtual Socket Interface Alliance

24. 24 References LOTTERYBUS: A New High-Performance Communication Architecture for System-on-Chip Designs yKanishka Lahiri zAnand Raghunathan zGanesh Lakshminarayanay http://citeseer.nj.nec.com/447789.html http://citeseer.nj.nec.com/447789.html Sonics' SiliconBackplane µNetwork & Open Core Protocol http://www.sonicsinc.com http://www.sonicsinc.com/Pages/Networks.html http://www.sonicsinc.com/Documents/ http://www.sonicsinc.com http://www.sonicsinc.com/Pages/Networks.html http://www.sonicsinc.com/Documents/ AMBA Flynn, D. AMBA: enabling reusable on-chip designs. IEEE Micro, vol.17, (no.4), IEEE, July-Aug. 1997. p.20-7. http://ielimg.ihs.com/iel4/40/13385/00612211.pdf http://ielimg.ihs.com/iel4/40/13385/00612211.pdf VSIA's On-chip Bus http://www.vsi.org/library/specs/summary.htm#ocb1 http://www.vsi.org/library/specs/summary.htm#ocb1