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8/10/2005 PhD Defense, Anisur Rahman 1 Exploring New Channel Materials for Nanoscale CMOS Devices: A Simulation Approach PhD Final Examination Anisur Rahman.

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Presentation on theme: "8/10/2005 PhD Defense, Anisur Rahman 1 Exploring New Channel Materials for Nanoscale CMOS Devices: A Simulation Approach PhD Final Examination Anisur Rahman."— Presentation transcript:

1 8/10/2005 PhD Defense, Anisur Rahman 1 Exploring New Channel Materials for Nanoscale CMOS Devices: A Simulation Approach PhD Final Examination Anisur Rahman PhD Co-Advisors: Professor Mark Lundstrom and Professor Gerhard Klimeck School of Electrical and Computer Engineering Purdue University, West Lafayette, IN 47907

2 8/10/2005 PhD Defense, Anisur Rahman 2 Doctoral Advisory Committee: Professor Supriyo Datta (ECE) Professor Ron Reifenberger (Physics) Dr. Avik Ghosh (ECE) Present Colleagues: Dr. Diego Kienle Dr. Jing Wang Sayed Hasan Neophytos Neophytou Siyu Koswatta Former Colleagues: Dr. Zhibin Ren (IBM) Dr. Ramesh Venugopal (TI) Dr. Jung-Hoon Rhew (Intel) Asst. Prof. Jing Guo (Univ. of Florida) Acknowledgements Funding: Funding: SRC and MARCO/FCRP-MSD

3 8/10/2005 PhD Defense, Anisur Rahman 3 Outline: Background Objective Generalized Effective-mass Approach Assessment of Ge n-MOSFETs A Top-of-the-barrier Ballistic Model Semi-empirical Tight-binding Approach Tight-binding Application: UTB DG CMOS Tight-binding Application: Self-consistent Electrostatics Summary Future Work Chapter 1 Chapter 2 Chapter 3 Chapter 4 Chapter 5 Chapter 6 Chapter 7 Chapter 8

4 8/10/2005 PhD Defense, Anisur Rahman 4 Background: CMOS Scaling Historical Development: Four decades of steady scaling Present day MOSFETs are nanoscale (L G ~30nm) Scaling is motivated by performance and integration density issues Moore’s Law describes this steady growth ITRS guides the future scaling trends Scaling Challenges: Implementation of Moore’s law becoming challenging Off-state leakage limits scaling of planar CMOS Additional gates needed to curb SCE (dual/tri-gate) Gate oxide scaling reached the limit (direct tunneling) High-κ dielectric + metal gate in near future Interface properties of Si-SiO 2 becoming less critical Moore’s Law 65nm Node Deviecs L G =35nm

5 8/10/2005 PhD Defense, Anisur Rahman 5 Background: New Materials Motivation for Novel Materirals: Ge and III-V display very high mobility, saturation velocity, and scattering mean-free path New process technology allows high-quality channel-insulator interface Ultra-high-speed, very-low-power logic application Experimental research is underway Key Device Physics Issues: Treatment of quantum mechanical effects Trade-off between high velocity and low DOS Atomic level fluctuation become significant Full-band treatment become necessary Q top v inj Current=Q top X v inj Q top =C G (V G -V T ) where, C G <C OX Source Drain Current Calculation SiGeGaAsInAsInSb Electron, μ n (cm 2 /V-sec) 600>100046002000030000 V sat (10 7 cm/sec) 1.0--1.23.55.0 MFP (nm)28--80194226 Electron Transport Property Ashley et al., ICSICT 2004

6 8/10/2005 PhD Defense, Anisur Rahman 6Objective: For New Channel Material Nanoscale CMOS Devices: Develop simulation tools and theoretical approaches Perform design studies, assess performance limits, and explore scaling characteristics Investigate relevance of carrier mobility Identify key bandstructure related issues Provide an improved understanding of their operation. Theoretical Approaches: Effective-mass-equation based quantum transport using NEGF formalism for novel-channel material n-MOSFETs Atomistic tight-binding approach for incorporating bandstructure effects in deeply scaled ballistic n- and p-MOSFETs

7 8/10/2005 PhD Defense, Anisur Rahman 7 Outline: Background Objective Generalized Effective-mass Approach Assessment of Ge n-MOSFETs A Top-of-the-barrier Ballistic Model Semi-empirical Tight-binding Approach Tight-binding Application: UTB DG CMOS Tight-binding Application: Self-consistent Electrostatics Summary and Conclusion Future Work Chapter 2 Chapter 3

8 8/10/2005 PhD Defense, Anisur Rahman 8 Theory: Effective Mass Approach Bottom Gate Source Drain Top Gate Channel Device Crystal Ellipse Key Features of EMA: Most widely used approach for n-MOSFETs Very successful to treat quantum transport in (100) Si n-MOSFETs NEGF and mode-space decomposition of the transport problem is highly efficient Outstanding Issue: When DCS and ECS are not aligned, EMT is a full 3X3 matrix and solution of EME is very difficult in Effective Mass Equation (EME)

9 8/10/2005 PhD Defense, Anisur Rahman 9 Theory: Generalized Effective Mass Unitary transformations conserves density of states and group velocity

10 8/10/2005 PhD Defense, Anisur Rahman 10 Results: Ge n-MOSFETs V D = 0.4 V Si (001)/[100] Ge (001)/[100] Ge (111)/[110] I DS [μA/μm] Ballistic NEGF I D -V G Ballistic NEGF I D -V D V G = 0.4 V I DS [μA/μm] Valley Deg. (4) (2) (1) Simulation Setup: End of ITRS 2001 UTB DG Ge n-MOSFETs NEGF ballistic and scattering simulation Design study performed nanoMOS 2.5 modified to treat Ge n-MOSFETs Ge devices on (100) and (111) wafers Process variation and mobility effects examined S D Ch LGLG L ul N SD L T =L G +2L ul Doping Density Profile EOT=0.6nm Rahman et al., IEDM 2003

11 8/10/2005 PhD Defense, Anisur Rahman 11 I OFF [μA/μm] Gate Length, L G [nm] W/C device Thin body Thick body V D = 0.4 V; V G = 0 V Nominal t body = 2.5 nm t body Energy Y Sensitivity to process variation Results: Ge n-MOSFETs V G = V D = 0.4V I DS [μA/μm]  ch =300cm 2 /V-sec S/D mobility,  SD [cm 2 /V-sec] ITRS 2016 Ballistic limit  ch =1000cm 2 /V-sec S D Ch N SD μ SD μ Ch NEGF Scattering

12 8/10/2005 PhD Defense, Anisur Rahman 12 Outline: Background Objective Generalized Effective-mass Approach Assessment of Ge n-MOSFETs A Top-of-the-barrier Ballistic Model Semi-empirical Tight-binding Approach Tight-binding Application: UTB DG CMOS Tight-binding Application: Self-consistent Electrostatics Summary and Conclusion Future Work Chapter 4

13 8/10/2005 PhD Defense, Anisur Rahman 13 Top-of-the-Barrier Ballistic Model Source Drain FSFS FDFD Gate Electrostatics S D Ch Top Gate Bottom Gate VDVD VSVS VGVG C OX CSCS CDCD CQCQ Circuit Model for 2-D Electrostatics UTB DG Model Device Key Features: Semiclassical ballistic transport Poisson equation solved only at top-of-barrier Quantum capacitance, C Q, treated Treats arbitrary bandstructure Treats floating source potential Two carrier fluxes, F S and F D present Sum of carrier density in F S and F D is total charge Difference of current from F S and F D is net current Rahman et al., TED, 2003

14 8/10/2005 PhD Defense, Anisur Rahman 14 Outline: Background Objective Generalized Effective-mass Approach Assessment of Ge n-MOSFETs A Top-of-the-barrier Ballistic Model Semi-empirical Tight-binding Approach Tight-binding Application: UTB DG CMOS Tight-binding Application: Self-consistent Electrostatics Summary Future Work Chapter 5

15 8/10/2005 PhD Defense, Anisur Rahman 15 Theory: Tight-binding a (001) (100) (010) (111) (110) Key Features: Localized atomic orbital-like basis set Suitable for modeling nanostructures Correct full bandstructure Strain, hetero-channel, novel materials Two FCC Lattices — Red and Blue Drain Channel Source Device — Ultra-thin Body Symmetric Dual-gate MOSFET Challenges: Appropriate TB model Finite dimensional systems Remove surface states Treat electrostatics Sparse matrix techniques Computing I-V

16 8/10/2005 PhD Defense, Anisur Rahman 16 NN-sp 3 s* 5 orbitals NN-sp 3 d 5 s* 10 orbitals Silicon CB ΔE c = +100meV VoglNEMO “Well-behaved” TB Parameter Set Manageable size — two center integrals Correct bandgap and effective masses Scalable for strained materials Boykin et al., PRB 69(11), 2004 Approach: A Good TB Model

17 8/10/2005 PhD Defense, Anisur Rahman 17 Approach: Band Bending Transport Potential Charge Poisson Charge Potential Self-consistence Calculate Bandstructure Bulk/HOI MOSFETs UTB MOSFETs VGVG EVEV ECEC n Z atoms TB Domain Poisson Domain VGVG EVEV ECEC n Z atoms TB Domain VGVG Band bending along thickness is less important in UTB. Band bending along thickness is important in bulk/HOI devices.

18 8/10/2005 PhD Defense, Anisur Rahman 18 Outline: Background Objective Generalized Effective-mass Approach Assessment of Ge n-MOSFETs A Top-of-the-barrier Ballistic Model Semi-empirical Tight-binding Approach Tight-binding Application: UTB DG CMOS Validity of single band parabolic E-k in Ge n-MOSFETs Compare Si, Ge, GaAs, InAs as channel materials Tight-binding Application: Self-consistent Electrostatics Summary Future Work Chapter 6

19 8/10/2005 PhD Defense, Anisur Rahman 19 ΔE c =300meV Bulk Ge Bandstructure: The CB Δ, Λ, Г within 250meV. Parabolic E-k valid at low energy Quantum confinement can alter the order of the bands. NN-sp 3 d 5 s * -SO ΔE c =170meV Red-Eff. mass Black-TB Study: Validity of Parabolic E-k in Ge Simulation Setup Simulation Setup : Validity of parabolic E-k in UTB unstrained Ge n-MOSFET examined 20 band sp 3 d 5 s * -SO TB used Three thicknesses: 16nm, 4nm, 2nm Band bending not treated I-V calculated from top-of-barrier model Rahman et al., IEDM 2004

20 8/10/2005 PhD Defense, Anisur Rahman 20 Results: Thick Body Limit (16nm) 1 2 3 2D E-k ~ 16nm (113 atomic layers) Ge body Size of H ~ 2200 X 2200 Electrostatic potential not treated (100) wafer  quantization along [100] Conduction band  subbands Non-parabolicity important at high energy I-V shown for (001)/[100] device 1 2 3 2D DOS Ballistic I-V V T not adjusted V DS = 0.4V [110] [100] L X Г

21 8/10/2005 PhD Defense, Anisur Rahman 21 Results: Going Thinner (4nm) V T not adjusted 25% lower I ON for eff. mass Δ V T =55 meV ~ 4nm (30 atomic layers) Ge body Size of H ~ 600 X 600 Conduction band  Subbands L and Г- Valleys came closer Non-parabolicity affects ground state Ge (001)/[100] device V T shifted by 55 meV (not adjusted) 1 2 3 [110] [100] 2D E-k 2 3 1 ΔVTΔVT 2D DOS V DS = 0.4V Ballistic I-V L X Г

22 8/10/2005 PhD Defense, Anisur Rahman 22 1 2 3 1 2 3 V T adjusted 2D E-k 2D DOS 15% higher I ON for eff. mass Δ V T =570 meV ΔVTΔVT ~ 2nm (12 atomic layers) Ge body Size of H ~ 240 X 240 Conduction band  Subbands At Г, X Valleys form ground state Strong non-parabolicity affects L-valleys V T shifted by 570 meV (adjusted) [110] [100] Ballistic I-V Results: Extreme Scaling (2nm) L X Г

23 8/10/2005 PhD Defense, Anisur Rahman 23 Outline: Background Objective Generalized Effective-mass Approach Assessment of Ge n-MOSFETs A Top-of-the-barrier Ballistic Model Semi-empirical Tight-binding Approach Tight-binding Application: UTB DG CMOS Validity of single band parabolic E-k in Ge n-MOSFETs Compare Si, Ge, GaAs, InAs as channel materials Tight-binding Application: Self-consistent Electrostatics Summary Future Work Chapter 6

24 8/10/2005 PhD Defense, Anisur Rahman 24 Study: New Channel Materials Energy, [eV] Si Ge E eff = 1.3eV E eff =1.04eV GaAs InAs E eff =1.72eV E eff =0.78eV Energy, [eV] Group IV Group III-V Objective: To explore and compare scaling characteristics of CMOS with Si, Ge, GaAs, InAs as channel materials. Simulation Setup: 2016 device specification from ITRS 2004 (22nm HP) UTB DG with, body: 19 AL (~2.5nm), EOT=0.5nm Unstrained material Semiclassical, top-of-barrier, ballistic model Bandstructure: CB and VB split into subbands Quantum confinement increase effective band gap Very high v inj expected for III-V Lowest CB are X 2 (Si), L 4 (Ge), Г 1 (GaAs, InAs) Si and Ge display higher CB DOS compared to III-V Rahman et al., to appear in IEDM 2005.

25 8/10/2005 PhD Defense, Anisur Rahman 25 Results: New Channel Materials Ge Si GaAs InAs I D -V D Device: Deeply scaled body (19AL) and oxide (0.5nm) Ballistic I D -V D : Ge performs best (n or p-FET) GaAs or InAs cannot compete with Si or Ge InAs n-FETs performs worst GaAs InAs Ge Si v inj -V G Injection velocity, v inj vs. V G : Very high v inj for III-V materials Electron v inj in InAs is highest, as expected Beyond 0.4V, GaAs v inj drops ( Г→L transfer) Ge Si GaAs InAs Q top -V G Carrier density, Q top vs. V G : Ge: High CB DOS is key to its success InAs: Electron Q top and C G is strongly degraded Beyond 0.4V, C G in GaAs improves ( Г→L transfer) Low CB DOS strongly degrades deeply scaled III-V device performances

26 8/10/2005 PhD Defense, Anisur Rahman 26 t ox =0.5nm Ge InAs Si GaAs t ox =0.5nm Ge InAs Si GaAs Ge InAs Si GaAs t ox =0.5nm Thin Oxide Thin EOT + Thick Body (Small C Q /C OX ): Ge n-MOSFETs perform best Q top s in III-V suffer, C G strongly degraded t ox =1.0nm Results: New Channel Materials Si Ge InAs & GaAs Ge InAs Si GaAs t ox =1.0nm Ge InAs Si GaAs I D -V D Q top -V G t ox =1.0nm v inj -V G Thick Oxide Effects of ratio C Q /C OX explored: 100 AL (~15nm) body thickness Only n-MOSFETs treated Ballistic transport using top-of-barrier model Less QC effect, subbands closely separated Thick body increase 2D DOS, consequently, C Q EOT =1.0nm, and 0.5nm (thin) considered. Thick EOT + Thick Body (Large C Q /C OX ): III-V n-MOSFETs perform best Silicon performs worst (slow X 4 valleys)

27 8/10/2005 PhD Defense, Anisur Rahman 27 Outline: Background Objective Generalized Effective-mass Approach Assessment of Ge n-MOSFETs A Top-of-the-barrier Ballistic Model Semi-empirical Tight-binding Approach Tight-binding Application: UTB DG CMOS Tight-binding Application: Self-consistent Electrostatics Mobility behavior in strained bulk p- and n- MOSFETs Hole density profile in HOI structure Summary Future Work Chapter 7

28 8/10/2005 PhD Defense, Anisur Rahman 28 Study: Strained Bulk p-MOSFETs Si Source Drain SiUnstrained SiGe Si Source Drain Substrate Induced Biaxial Tension SiGe Drain SiGe Si Source Process Induced Uniaxial Compression Rim et al. (Biaxial) 2002 Rim et al. (Biaxial) 1995 Universal Hole Mobility (Unstrained) Mobility [cm 2 /V-sec] E eff [MV/cm] Intel 90 nm (Uniaxial) Experimental Hole Mobility Overview: Devices on (100) wafers Strain can be substrate-induced (biaxial) or process-induced (uniaxial) Strain deforms crystal by changing bond lengths and bond orientations Biaxial tensile strain: Hole mobility improves at low gate bias but disappears at high bias Uniaxial compressive strain: Hole mobility improvement at low V G retained at high V G Thompson et al., TED 04

29 8/10/2005 PhD Defense, Anisur Rahman 29 Top VB HH Second VB LH Unstrained Strained Consequence of Strain: sp 3 d 5 s * -SO Unstrained Bulk Si VB Strained Bulk Si VB

30 8/10/2005 PhD Defense, Anisur Rahman 30 Results: Strained Bulk p-MOSFETs and High V G Ballistic I ON Ratio vs. E eff Rim et al. (Biaxial) 2002 Rim et al. (Biaxial) 1995 Universal Hole Mobility (Unstrained) Mobility [cm 2 /V-sec] E eff [MV/cm] Intel 90 nm (Uniaxial) Experimental Hole Mobility Bulk p-FETs: Self-consistent sp 3 d 5 s * -SO TB approach Low V G : Top VB LH for both uniaxial and biaxial High V G : Top VB HH for biaxial, LH for uniaxial QC nullify strain splitting of LH,HH in biaxial case Ballistic simulation explains mobility behavior in strained p-MOSFETs 2D E-k, Low V G E eff =q(N dep +p/3)/ ε S i

31 8/10/2005 PhD Defense, Anisur Rahman 31 Study: Strained Bulk n-MOSFETs Ballistic n-MOSFETs E eff =q(N dep +p/2)/ ε Si SiGe Drain SiGe Si Source Process Induced Uniaxial Tension Mobility Behavior in n-MOSFETs: Experimentally, both substrate-induced biaxial- tension and process-induced uniaxial-tension improves electron mobility Electronic mobility enhancement is observed over the entire range of gate bias Such mobility enhancement is often explained in terms of degeneracy removal of X 2 and X 4 valleys, which is recently questioned (Fischetti et al., JAP, 2002.) Simulation Setup and Observation: Self-consistent sp 3 d 5 s * -SO TB model and the top-of- barrier ballistic model does not show any enhancement of strained device performance Bandstructure alone cannot explain the electronic mobility enhancement in strained planar n-MOSFETs

32 8/10/2005 PhD Defense, Anisur Rahman 32 Outline: Background Objective Generalized Effective-mass Approach Assessment of Ge n-MOSFETs A Top-of-the-barrier Ballistic Model Semi-empirical Tight-binding Approach Tight-binding Application: UTB DG CMOS Tight-binding Application: Self-consistent Electrostatics Mobility behavior in strained bulk p- and n- MOSFETs Hole density profile in HOI structure Summary Future Work Chapter 7

33 8/10/2005 PhD Defense, Anisur Rahman 33 ε-Si (y=0.24) ε-Si 0.5 Ge 0.5 TOX BOX Biaxial tensile Biaxial compressive 30 AL ~ 4 nm 30 AL ~ 4 nm 21 AL ~ 3 nm E EVEV ECEC Simulation Setup: The 20 band sp 3 d 5 s * -SO TB model with self- consistent electrostatics. Compressively strained Si 0.5 Ge 0.5 sandwiched between two Si layers under tensile strain. Top and bottom oxides are 2 nm and 10 nm thick, respectively. Heterostructure on Insulator ( HOI ) Utilizes the high mobility central SiGe channel to improve hole mobility Band discontinuity moves holes to center Band bending due to V G rearranges hole profile Buried Oxide Poly-Si ε-Si ε-SiGe Hoyt Group (MIT) Schematic Representation Study: Hole Profile in HOI

34 8/10/2005 PhD Defense, Anisur Rahman 34 Results: HOI BOX Si/SiGe/Si Hole Profile VB Profile BOX Si/SiGe/Si BOX Si/SiGe/Si Observations: Tri-layer (Si-SiGe-Si) structure t OX = 2 nm(top), t OX =10 nm(bot) Low V G : band discontinuity moves holes to central channel. High V G : hole profile moves near the surface. Q-V G E F = 0.45 eV

35 8/10/2005 PhD Defense, Anisur Rahman 35 Outline: Background Objective Generalized Effective-mass Approach Assessment of Ge n-MOSFETs A Top-of-the-barrier Ballistic Model Semi-empirical Tight-binding Approach Tight-binding Application: UTB DG CMOS Tight-binding Application: Self-consistent Electrostatics Summary Future Work Chapter 8

36 8/10/2005 PhD Defense, Anisur Rahman 36 Summary: Effective mass approach extended to treat n-MOSFETs on arbitrary wafer orientations. An NEGF study of L G =10nm end of ITRS Ge n-MOSFET reveals that: Ge (001)/[100] device performs best and can meet target I ON Gate under-lap improves short-channel-effects High mobility in the S/D region is crucial to limit R S degradation A strict process tolerance in body thickness necessary to limit V T fluctuation across the chip. A physics based top-of-the-barrier semiclassical ballistic transport model developed and its application demonstrated. Continued to next slide

37 8/10/2005 PhD Defense, Anisur Rahman 37 Summary (cont.): A semi-empirical 20 band sp 3 d 5 s * -SO TB model used to assess strained and unstrained UTB novel channel material CMOS devices, and was reveled that: Ge n-MOSFETs: Below 4nm thickness, use of single band parabolic E-k is limited by non-parabolicity. Below 2nm thickness, its use is further limited by band reordering and multi-valley conduction. A trade-off exists between high v inj and low DOS. III-V devices outperform Si or Ge n-MOSFETs only for thick body and thick EOT. For deeply scaled devices Ge displays the best ballistic performances. Self-consistent gate electrostatics was treated in sp 3 d 5 s * -SO TB model and was revealed that: Experimental hole mobility behavior in strained planar p-MOSFETs can be explained by bandstructure modulation. Similar behavior for electron mobility in n-MOSFETs cannot be explained by bandstructure alone. HOI simulation shows that at high gate field, the hole-profile moves near the surface and not at the central high-mobility SiGe layer.

38 8/10/2005 PhD Defense, Anisur Rahman 38 Future Work 1.Separate the effects of bandstructure and scattering in published experimental mobility data 2.Discretize the TB Hamiltonian for arbitrarily oriented wafers—Only (100) wafers treated here 3.Mode-space representation of TB Hamiltonian for UTB MOSFETs—A full 2D representation is not feasible, computationally 4.Employ zone-unfolding technique to treat SRS and random alloy effects 5.Employ self-consistent TB approaches for III-V HEMT and QWFET devices— Ballistic simulation is more relevant here due to their very high mobility


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