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Team W3: Anthony Marchetta Derek Ritchea David Roderick Adam Stoler Milestone 11: April 12th Short Final Presentation Overall Project Objective: Design.

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Presentation on theme: "Team W3: Anthony Marchetta Derek Ritchea David Roderick Adam Stoler Milestone 11: April 12th Short Final Presentation Overall Project Objective: Design."— Presentation transcript:

1 Team W3: Anthony Marchetta Derek Ritchea David Roderick Adam Stoler Milestone 11: April 12th Short Final Presentation Overall Project Objective: Design an Air-Fuel Ratio Controller for a small gasoline engine with low emissions and low cost Design Manager: Steven Beigelmacher

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3 Status Design Proposal (done) Architecture (done) Gate Level Design (done) Component Layout (done) Component Simulation (done) Chip-Level Layout (done) Spice Simulations (errors) –Schematic simulates –Layout errors

4 Marketing What are chip can do for the world Design Objective 4 P’s –Product –Price –Promotion –Place

5 Algorithm Description Design objectives –Area, cost, speed, etc. How chip works? Detailed look at flowchart Key pieces examined Schematic overview How data flows?

6 Verification C Verification Verilog Verification Simulation Plan –Schematic Spice – Layout Spice

7 Floorplan Initial thoughts Floorplan evolution –Major changes in evolution Concluding thoughts

8 Issues Multiplier –Initial use of floating or fixed –Reduction in size –How it effected floorplan Combing SRAM Control ROM decision LVS Problems Spice Problems

9 Layout Masks –Active –Poly –Metal 1 – 4 Major Components Full Layout –Data Flow

10 Specs Pin Specs –I/O Specs Chip Specs –Transistor # –Area –Density –Aspect Ratio –Speed

11 Who’s speaking about what? Introduction (3) Marketing (8) Algorithm Description (8) Verification (4) Floorplan (5) Issues (6) Layout (12) Specs (2) Conclusions (2) Approximately 50 slides Derek (11) Adam (12) Dave (16) Tony (11) } } } }

12 Update on Spice Sims Schematic fully and correctly Spice simulates Receive error in layout spice simulation

13 Spice Error **warning**: only 1 connection at node 1:7517 : called in element 1:r125121 at line 83396 within the hspice source, library or include file **warning**: only 1 connection at node 1:8728 : called in element 1:r125339 at line 83505 within the hspice source, library or include file **error**: only 1 connection at node 1:8904 : called in element 1:c36329 at line 4054 within the hspice source, library or include file ***** job aborted

14 ANSWERS????


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