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1 CSC 535 Communication Networks I Appendix 3A Asynchronous Communications Dr. Cheer-Sun Yang.

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Presentation on theme: "1 CSC 535 Communication Networks I Appendix 3A Asynchronous Communications Dr. Cheer-Sun Yang."— Presentation transcript:

1 1 CSC 535 Communication Networks I Appendix 3A Asynchronous Communications Dr. Cheer-Sun Yang

2 2 RS-232 (Recommended Standard 232) zRS-232 is an Electronic Industries Association (EIA) standard zData Terminal Equipment (DTE): computers, terminals zData Communications Equipment (DCE): modem

3 3 Asynchronous and Synchronous Transmission zTiming problems require a mechanism to synchronize the transmitter and receiver zTwo solutions yAsynchronous ySynchronous

4 4 Asynchronous zIn RS-232, each data bit is transmitted asynchronously on the serial line in the sense that the receiver clock is not synchronized with a receiver’s clock. zFor the receiver to sample the data bits correctly, the transmitter precedes the transmission of data with a start bit. zData transmitted one character at a time y5 to 8 bits zResync with each character

5 5 Asynchronous (diagram)

6 Copyright 2000 McGraw-Hill Leon-Garcia and Widjaja Communication Networks6 Figure 3.68

7 7 Asynchronous - Behavior zIn a steady stream, interval between characters is uniform (length of stop element) zIn idle state, receiver looks for transition 1 to 0 zThen samples next seven intervals (char length) zThen looks for next 1 to 0 for next char zSimple zCheap zOverhead of 2 or 3 bits per char (~20%) zGood for data with large gaps (keyboard)

8 8 Asynchronous - Behavior zThe receiver clock frequency should be approximately the same as the transmitter clock frequency in order to sample the data bits correctly. zWe’d like to know how different their clocks can be so that the receiver can still correctly receive the signals sent out by the transmitter.

9 9 Asynchronous - Behavior zIf the receiver’s clock is slower than the transmitter’s clock and the last sample must occur before the end of the stop bit, we must have 9.5T < 10X. zIf the receiver’s clock is faster than the transmitter’s clock and the last sample must occur after the beginning of the stop bit, we must have 9.5T > 9X. z|(T-X)/X| < 5.3% zThe receiver clock frequency must be within 5.3 percent of the transmitter clock frequency.

10 10 Synchronous - Bit Level zBlock of data transmitted without start or stop bits zClocks must be synchronized zCan use separate clock line yGood over short distances ySubject to impairments zEmbed clock signal in data yManchester encoding yCarrier frequency (analog)

11 11 Synchronous - Block Level zNeed to indicate start and end of block zUse preamble and postamble ye.g. series of SYN (hex 16) characters ye.g. block of 11111111 patterns ending in 11111110 zMore efficient (lower overhead) than async

12 12 Synchronous (diagram)

13 13 Line Configuration zTopology yPhysical arrangement of stations on medium yPoint to point yMulti point xComputer and terminals, local area network zHalf duplex yOnly one station may transmit at a time yRequires one data path zFull duplex ySimultaneous transmission and reception between two stations yRequires two data paths (or echo canceling)

14 14 Traditional Configurations

15 15 Interfacing zData processing devices (or data terminal equipment, DTE) do not (usually) include data transmission facilities zNeed an interface called data circuit terminating equipment (DCE) ye.g. modem, NIC zDCE transmits bits on medium zDCE communicates data and control info with DTE yDone over interchange circuits yClear interface standards required

16 16 Characteristics of Interface zMechanical yConnection plugs zElectrical yVoltage, timing, encoding zFunctional yData, control, timing, grounding zProcedural ySequence of events

17 17 V.24/EIA-232-F zITU-T v.24 zOnly specifies functional and procedural yReferences other standards for electrical and mechanical zEIA-232-F (USA) yRS-232 yMechanical ISO 2110 yElectrical v.28 yFunctional v.24 yProcedural v.24

18 Copyright 2000 McGraw-Hill Leon-Garcia and Widjaja Communication Networks18 DTEDCE Protective Ground (PGND) Transmit Data (TXD) Receive Data (RXD) Request to Send (RTS) Clear to Send (CTS) Data Set Ready (DSR) Ground (G) Carrier Detect (CD) Data Terminal Ready (DTR) Ring Indicator (RI) 1 2 3 4 5 6 7 8 20 22 1 2 3 4 5 6 7 8 20 22 (b) (a)                          1 13 25 14 Figure 3.67

19 19 Mechanical Specification

20 20 Procedural Specification zE.g. Asynchronous private line modem zWhen turned on and ready, modem (DCE) asserts DCE ready zWhen DTE ready to send data, it asserts Request to Send yAlso inhibits receive mode in half duplex zModem responds when ready by asserting Clear to send zDTE sends data zWhen data arrives, local modem asserts Receive Line Signal Detector and delivers data

21 21 Dial Up Operation (1)

22 22 Dial Up Operation (2)

23 23 Dial Up Operation (3)

24 24 Null Modem

25 25 Reading Material zAppendix 3A


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