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Penn ESE535 Spring DeHon 1 ESE535: Electronic Design Automation Day 23: April 10, 2013 Statistical Static Timing Analysis

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Delay PDFs? (2a) Penn ESE535 Spring DeHon 2

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3 Today Sources of Variation Limits of Worst Case Optimization for Parametric Yield Statistical Analysis Behavioral (C, MATLAB, …) RTL Gate Netlist Layout Masks Arch. Select Schedule FSM assign Two-level Multilevel opt. Covering Retiming Placement Routing

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Penn ESE535 Spring DeHon 4 Central Problem As our devices approach the atomic scale, we must deal with statistical effects governing the placement and behavior of individual atoms and electrons Technology Node (nm) Mean Number of Dopant Atoms Transistor critical dimensions Atomic discreteness Subwavelength litho Etch/polish rates Focus Number of dopants Dopant Placement

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Penn ESE535 Spring DeHon 5 Oxide Thickness [Asenov et al. TRED 2002]

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Penn ESE535 Spring DeHon 6 Line Edge Roughness 1.2 m and 2.4 m lines From:

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Light What is wavelength of visible light? Penn ESE535 Spring DeHon 7

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8 Phase Shift Masking Source

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Penn ESE535 Spring DeHon 9 Line Edges (PSM) Source:

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Penn ESE535 Spring DeHon 10 Intel 65nm SRAM (PSM) Source:

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Penn ESE535 Spring DeHon 11 Statistical Dopant Placement [Bernstein et al, IBM JRD 2006]

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Penn ESE535 Spring DeHon 12 V th 65nm [Bernstein et al, IBM JRD 2006]

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Gaussian Distribution Penn ESE535 Spring DeHon 13 From:

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Penn ESE535 Spring DeHon 14 ITRS 2005 Variation (3 )

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Example: V th Many physical effects impact V th –Doping, dimensions, roughness Behavior highly dependent on V th Penn ESE535 Spring DeHon 15

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Impact Performance V th I ds Delay (R on * C load ) Penn ESE535 Spring DeHon 16

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Impact of V th Variation Penn ESE535 Spring DeHon 17

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Variation in Current FPGAs 18 Penn ESE535 Spring DeHon [Gojman et al., FPGA2013]

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Reduce Vdd (Cyclone IV 60nm LP) Penn ESE535 Spring DeHon 19 [Gojman et al., FPGA2013]

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Penn ESE535 Spring DeHon 20 Source: Noel Menezes, Intel ISPD2007

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Penn ESE535 Spring DeHon 21 Source: Noel Menezes, Intel ISPD2007

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Penn ESE535 Spring DeHon 22 Old Way Characterize gates by corner cases –Fast, nominal, slow Add up corners to estimate range Preclass: –Slow corner: 1.1 –Nominal: 1.0 –Fast corner: 0.9

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Penn ESE535 Spring DeHon 23 Corners Misleading [Orshansky+Keutzer DAC 2002]

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Penn ESE535 Spring DeHon 24 Parameteric Yield Probability Distribution Delay Discard Sell Premium Sell nominal Sell cheap

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Penn ESE535 Spring DeHon 25 Phenomena 1: Path Averaging T path = t 0 +t 1 +t 2 +t 3 +…t (d-1) T i – iid random variables –Mean –Variance Tpath –Mean d× –Variance d ×

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Penn ESE535 Spring DeHon 26 Sequential Paths T path = t 0 +t 1 +t 2 +t 3 +…t (d-1) T path –Mean d× –Variance d × 3 sigma delay on path: d× d × –Worst case per component would be: d×( –Overestimate d vs. d

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Penn ESE535 Spring DeHon 27 SSTA vs. Corner Models STA with corners predicts 225ps SSTA predicts 162ps at 3 SSTA reduces pessimism by 28% Source: IBM, TRCAD 2006 [Slide composed by Nikil Mehta]

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Penn ESE535 Spring DeHon 28 Phenomena 2: Parallel Paths Cycle time limited by slowest path T cycle = max(T p0,T p1,T p2,…T p(n-1) ) P(T cycle

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Penn ESE535 Spring DeHon 29 System Delay P(T p

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Gaussian Distribution Penn ESE535 Spring DeHon 30 From:

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Penn ESE535 Spring DeHon 31 System Delay P(T p

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Penn ESE535 Spring DeHon 32 System Delay

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Penn ESE535 Spring DeHon 33 System Delay

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Penn ESE535 Spring DeHon 34 Corners Misleading [Orshansky+Keutzer DAC 2002] Phenomena 2 Phenomena 1

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Penn ESE535 Spring DeHon 35 Source: Noel Menezes, Intel ISPD2007

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Penn ESE535 Spring DeHon 36 But does worst-case mislead? STA with worst-case says these are equivalent:

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Penn ESE535 Spring DeHon 37 But does worst-case mislead? STA Worst case delay for this?

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Penn ESE535 Spring DeHon 38 But does worst-case mislead? STA Worst case delay for this?

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Does Worst-Case Mislead? Delay of off-critical path may matter Best case delay of critical path? Wost-case delay of non- critical path? Penn ESE535 Spring DeHon 39

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Penn ESE535 Spring DeHon 40 What do we need to do? Ideal: –Compute PDF for delay at each gate –Compute delay of a gate as a PDF from: PDF of inputs PDF of gate delay

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Penn ESE535 Spring DeHon 41 Delay Calculation AND rules Day 22

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Penn ESE535 Spring DeHon 42 What do we need to do? Ideal: –compute PDF for delay at each gate –Compute delay of a gate as a PDF from: PDF of inputs PDF of gate delay –Need to compute for distributions SUM MAX (maybe MIN)

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For Example Consider entry: –MAX(u 1,u 2 )+d Penn ESE535 Spring DeHon 43

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MAX Compute MAX of two input distributions. Penn ESE535 Spring DeHon 44

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SUM Add that distribution to gate distribution. Penn ESE535 Spring DeHon 45

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Continuous Can roughly carry through PDF calculations with Guassian distributions rather than discrete PDFs Penn ESE535 Spring DeHon 46

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Penn ESE535 Spring DeHon 47 Dealing with PDFs Simple model assume all PDFs are Gaussian –Model with mean, –Imperfect Not all phenomena are Gaussian Sum of Gaussians is Gaussian Max of Gaussians is not a Gaussian

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Penn ESE535 Spring DeHon 48 MAX of Two Identical Gaussians Max of Gaussians is not a Gaussian Can try to approximate as Guassian Given two identical Gaussians A and B with and Plug into equations E[MAX(A,B)] = + /( ) 1/2 VAR[MAX(A,B)] = 2 – / [Source: Nikil Mehta]

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Penn ESE535 Spring DeHon 49 Probability of Path Being Critical [Source: Intel DAC 2005]

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Penn ESE535 Spring DeHon 50 More Technicalities Correlation –Physical on die –In path (reconvergent fanout) Makes result conservative –Gives upper bound –Can compute lower Graphics from: Noel Menezes (top) and Nikil Mehta (bottom)

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Penn ESE535 Spring DeHon 51 Max of Gaussians with Correlation Max of identical Gaussians [Blaauw et al. TRCAD v27n4p589]

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Penn ESE535 Spring DeHon 52 MAX of Two Identical Gaussians Given two identical Gaussians A and B with and Plug into equations E[MAX(A,B)] = + /( ) 1/2 VAR[MAX(A,B)] = 2 – / [Source: Nikil Mehta] Extreme of correlated: is just the input Gaussian

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Penn ESE535 Spring DeHon 53 SSTA vs. Monte Carlo Verification Time Source: IBM, TRCAD 2006

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Penn ESE535 Spring DeHon 54 Using SSTA in FPGA CAD Kia –FPGA2007 –Route with SSTA Le Hei –FPGA2007 –SSTA Synthesis, Place, Route [Slide composed by Nikil Mehta]

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Penn ESE535 Spring DeHon 55 Impact of SSTA in High-Level Synthesis Scheduling and provisioning –ALU/MUL =5% t nominal [Jung&Kim ICCAD2007]

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Penn ESE535 Spring DeHon 56 Summary Nanoscale fabrication is a statistical process Delays are PDFs Assuming each device is worst-case delay is too pessimistic –Wrong prediction about timing –Leads optimization in wrong direction Reformulate timing analysis as statistical calculation Estimate the PDF of circuit delays Use this to drive optimizations

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Penn ESE535 Spring DeHon 57 Big Ideas: Coping with uncertainty Statistical Reasoning and Calculation

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Penn ESE535 Spring DeHon 58 Admin Reading for Monday on blackboard Milestone Mondays

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