1. Focus group: Statistical synthesis

2. Top reasons to go for statistical Often cited - worst case is way off - exact SI and IR drop analysis is too complex - process and environment variation - economical reasons Not often cited - it pisses my boss off - commercial tools suck - I like to be different - people and circuits need to play by same rules - it’s none of your business

3. Objects How to keep clock as a golden reference? -regular structures (meshes) -common path pessimism removal - Is analysis needed? - Are we desperate? YES (Yuji, Michel) NO (10% is too much) Reference clock Logic

4. Objects How to keep clock as a golden reference? -regular structures (meshes) -common path pessimism removal Reference clock Logic - Is analysis needed? - Are we desperate? YES (Yuji, Michel) NO (10% is too much) Main efforts

5. Cadence Magma Foundries EDA companies TI TSMC Break in Design Chain

6. Rule of games I. Corner cases Best Worst Problems: - Worst and best are far More corner cases (up to 16)

7. Rule of games I. Corner cases Best Worst Problems: - Worst and best are far - Monotonicity??? More corner cases (up to 16) Assumption: Life in a silicon world is boring

8. Rule of games I. Corner cases Best Worst Problems: - Worst and best are far - Monotonicity??? More corner cases (up to 16) “Life is beautiful!!!” (Benini) Corner case analysis cannot solve the problem

9. Rule of games II. Avoiding risk FoundryEDA Company X * Sigma Worst gate delay worst Worst path delay Sigmas are added

10. Optimization room worst Confidence margin Confidence margin must be big (chips work) But it is fully unknown Statistical analysis and synthesis might help to quantify risk (reduce confidence margin and be structure specific) Statistical analysis might help to trade off confidence margin and yield!

11. Optimization room worst Confidence margin Confidence margin must be big (chips work) But it is fully unknown Statistical analysis and synthesis might help to quantify risk (reduce confidence margin and be structure specific) Statistical analysis might help to trade off confidence margin and yield! But testing is a big obstacle!!! -delay fault testing is very difficult - at-speed testing is very costly (BIST could be an option)

12. Optimization room worst Confidence margin Focus of STA Given: Timing constraints and N  Find: Implementation with D crit within N 

13. Can I start coding now? Critical path

14. Can I start coding now? ? -Numerical computation of a distribution -Approximate convolution (5% accuracy) -Use upper and lower bounds (10% diff. Blaauw’03) Conclusion: we are almost there (check normality assumption, justify approximations) Reconvergence needs some care

15. Today’s vitamins or medicine? -Use of statistical models from foundries -Measuring systematic component of variability (IBM inverter rings) -Exploiting locality in placement of critical parts -Averaging variability by using deeper logic (or balancing logic) -Latch-based designs to relax synchronization constraints

16. -Regular non-standard cell design structures (PLA???) Tomorrow’s medicine? Gates dominate wires -> Standard cells are good Submicron paradigm shift: cheap computation vs costly communication Back to good days: raise the granularity of computation (Bob knows) -Introducing redundancy Conscious redundant encoding (a-la asynchronous) for smart Duplication of critical parts (different implementation) for dummies