1. 22 settembre 2004A. Annovi1 SVT upgrade status A. Annovi - Assisi, 22 settembre 2004

2. 22 settembre 2004A. Annovi2 SVT: Silicon Vertex Trigger XFT tracks SVX hits Finding tracks in the silicon

3. 22 settembre 2004A. Annovi3 Level 2 Asynchronous 3 Stage Pipeline 20  s Latency 300 Hz accept rate CDF DAQ & Trigger Detector Raw Data Level 1 pipeline: 42 clock cycles L1 Accept Level 2 Trigger Level 2 buffer: 4 events L2 Accept DAQ buffers L3 Farm Level 1 7.6 MHz Synchromous Pipeline 5544 ns Latency 50 KHz accept rate To Mass Storage (50~100 Hz) 7.6 MHz Crossing rate SVT here Level 1 Trigger 50 kHz accept rate 20  s average Latency ~20 kHz actual ~35  s actual Tails are important

4. 22 settembre 2004A. Annovi4 L1 accept rate is bottle neck L1A rate ~ 20 kHz (vs 50kHz design) L1A rate limited by L2 exec time Rates at @ L=100E30 (current luminosity): ~15kHz high Pt L1A ~15kHz TTT L1A (now PS = 2) Rates growing quadratically with luminosity Silicon readout SVT processing L2 decision processing Level 2 pipeline structure: Optimized but slower than design Upgrade in progress SVT upgrade has large impact on maximum L1A rate!

5. 22 settembre 2004A. Annovi5 Tempi di processamento: come agisce l’upgrade ? Ricetta per velocizzare il tempo di esecuzione di SVT: 1.pattern piu’ sottili (AM grande)  meno fits. 2.Road Warrior per rimuovere i ghosts Hit Finders Merger Associative Memory Hit Buffer Track Fitter to Level 2 COT tracks fromXTRP 12 fibers hits roads hits x 12 phi sectors Sequencer raw data from SVX front end NUOVA AM piu’ grande Road Warrior SVT exec time ~ proporzionale # candidati da fittare

6. 22 settembre 2004A. Annovi6 TEMPI DI REALIZZAZIONE Nuova AM-board: inizio estate 2004 ( Pisa ) durante estate 2004: test con FPGA ( Pisa ) Progetto prototipo AM-chip: luglio 2004 ( Ferrara-Pisa ) consegna chip ~2 mesi – disponibile ad ottobre. Nuova LAMB: montare nuovo AM-chip a ottobre 2004 (Pisa) test del chip + scheda: ottobre – dicembre 2004 ( Pisa-Ferrara ) produzione: inizio 2005 ( Pisa-Ferrara ) installazione: estate 2005 ( Pisa-Ferrara ) Altri DAQ/Trigger upgrade: previsti nel 2006 Road Warrior :... (~60 k$ Fermilab) messa in opera entro fine 2003  F. Spinella (in funzione)

7. 22 settembre 2004A. Annovi7

8. 22 settembre 2004A. Annovi8 Tsukuba Chicago

9. 22 settembre 2004A. Annovi9 Mezzanine slots AUX card Pulsar Custom Mezzanine Bottom view Works up to 100MHz Top view Pulsar (Pulser And Recorder) Design Three ALTERA APEX 20K400 FPGAs I/O Mezzanine cards for: l S-LINK (CERN/LHC) l Hotlink l TAXI l to be specified  Self-testable  Modular, lego-style open design  Replacing > 10 CDF board types  all CDF, many ATLAS connectors/standards

10. 22 settembre 2004A. Annovi10 AMchip

11. 22 settembre 2004A. Annovi11 What are we doing? AM++ (A. Annovi, A. Bardi, M. Dell’Orso, P. Giannetti, P. Giovacchini, I. Roffilli, F. Spinella, R. Tripiccione) –new AMchip (Pisa and Ferrara) –new AMplug (LAMB) –new AMBoard (AM++) RW installed and working!!! AMS/RW (Piendibene M. and Spinella F.) –AMS firmware –RW firmware 3 test stands

12. 22 settembre 2004A. Annovi12 AMchip status. 200 dies produced (expected 80) ~150 packaged chips by September 30 Testing the “Test stand” hw/sw with FPGA Automatic test vector transfer from simulation Test stand working Inputs from Pattern Generator Output to Logic Analyzer AMChip socket

13. 22 settembre 2004A. Annovi13 LAMB status FTK LAMB prototype now used for sw development SVT LAMB prototype v1 mounting 4/32 FPGAs some mounting problems CLPDs/FPGAs programmed Tests in progress

14. 22 settembre 2004A. Annovi14 AM++ status 1 st crate: FTK AM prototype with FTK LAMB for sw devel and/or with SVT LAMB for LAMB test 2 nd crate: SVT AM prototype Mounting delays talking with AMS/RW in pulsar (starting now)

15. 22 settembre 2004A. Annovi15 AMS/RW status CTRL firmware partial version for test with AM++ in progress DATA IO2 firmware (RW function) to be done DATA IO1 firmware ready for test stand

16. 22 settembre 2004A. Annovi16 Year chip boards devel. Total 2003? 120 kE10 kE(test b.) 5 kE 135 kE 2004 - 10 kE (protot.) 30 kE 40 kE 2005 53 kE 100 kE (produc.) 153 k +40 kE +40 kE Ferrara Pisa Le Pulsar sono pagate dagli USA totale secondo upgrade 280$

17. 22 settembre 2004A. Annovi17 Conclusions Hardware and firmware development on schedule. Most of the fun (or pain?) will start soon: standard cell AMchip by September 30 LAMB and AM++ in test stand now

18. 22 settembre 2004A. Annovi18 SVT Backup slides backup slides

19. 22 settembre 2004A. Annovi19 Trigger/DAQ Upgrades for Run IIb Need to Maintain or increase bandwidth –  Luminosity   Rate (=  L) –  Luminosity   inter/x-ing   Complexity (and fakes)   Event Size,  Exec. time –All   physics to tape L1 Bandwidth (output to L2) –XFT  Purity   trigger (L1, L2) –SVT, L2  L2 Exec. t  L1 Bandwidth L2 Bandwidth (output to L3) –COT TDC  Readout rate –Level 3 Processing  L3 Exec. t –Event Builder  Readout rate L3 Bandwidth (output to tape) –CSL  Tape rate (not under IIb project)

20. 22 settembre 2004A. Annovi20 AMB++ during 2005 AMB++: the group will split between Pisa and Fermilab the first six months. Pisa: Bardi, Giannetti: January-May production of amchips, LAMBs and AMBoards: Fermilab: P. Giovacchini, A. Annovi January-May (a) tests of the AMB++ prototype with all procedures (b) insert AMB++ in Run Control June-September: all in Fermilab: install and test of the whole system AMB++ autumn 2004 Prototype tests in Pisa 2 nd prototype generation

21. 22 settembre 2004A. Annovi21 IP resolution SVT performances From TDR  d =25  m

22. 22 settembre 2004A. Annovi22 Pisa: Annovi dottorando Bardiingegnere - art. 23 Dell’Orsoprof. Associato Giannettidirigente di ricerca Spinella assegnista INFN P. Giovacchinilaureando M. Piendibene borsista Ferrara: Damiani assegnista(10%) Sartoriassegnista(50%) Tripiccioneprof. Ordinario(10%) Cottatecnologo(10%) Chiozzitecnico (20%) I. Roffilli contratto

23. 22 settembre 2004A. Annovi23

24. 22 settembre 2004A. Annovi24 Software TODO list Online (11 mesi FTE) DAQ related code Diagnostic Spy “monitoring” HW Diagnostic/debugging tools Offline (4 mesi FTE) Configuration Simulation Diagnostic on data

25. 22 settembre 2004A. Annovi25 sw