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DASAR DIGITAL & SIMULATOR XILINX Minggu 2 & 3. Gerbang-gerbang digital AND ABY 000 010 100 111 OR ABY 000 011 101 111 NOT AY 01 10.

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Presentation on theme: "DASAR DIGITAL & SIMULATOR XILINX Minggu 2 & 3. Gerbang-gerbang digital AND ABY 000 010 100 111 OR ABY 000 011 101 111 NOT AY 01 10."— Presentation transcript:

1 DASAR DIGITAL & SIMULATOR XILINX Minggu 2 & 3

2 Gerbang-gerbang digital AND ABY OR ABY NOT AY 01 10

3 NAND ABY NOR ABY XOR ABY XNOR ABY

4 Rangkaian terintegrasi  Half adder Half adder dengan 4 gerbang Half adder dengan 2 gerbangn logika Tabel kebenaran half adder InputOutput ABSC Ket : S = Sum, hasil jumlah C = Carry, sisa hasil jumlah

5 Full adder Tabel kebenaran full adder Input Output ABCCS

6 Half adder dari 2 rangkaian

7 SIMULATOR XILINX Perancangan rangkaian digital : State diagram Hardware Description language (HDL)  ABEL & VHDL Schematic Editor Dipelajari :  mulai projek baru  menggambarkan skematik rangkaian digital  simulasi rangkaian

8 Mulai projek : Klik ikon projek manager sehingga bisa masuk ke Xilinx Projek manager.

9 Disain rangkaian digital File  New Project

10 Schematic Editor Klik Schematic editor untuk memulai menggambar rangkaian

11 Gambar rangkaian : Options  Create Netlist Options  integrity test Simulasi

12 Signal  Add Signals Signal  Add Stimulators

13 View  Main toolbox Hasil simulasi gerbang AND

14 Tugas :  Simulasikan gerbang digital dasar!


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