# Combinational Circuits ENEL 111. Common Combinationals Circuits NAND gates and Duality Adders Multiplexers.

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Combinational Circuits ENEL 111

Common Combinationals Circuits NAND gates and Duality Adders Multiplexers

De Morgan again A NAND gate: Y = A.B = A + B is the same as an OR gate with two NOT gates Similarly a NOR gate is the same as an AND gate with two inverters Y = A + B = A.B not the individual terms change the sign not the lot

Dual gates not the individual inputs change the gate not the output

Truth Tables and Boolean Notation NAND Gate Representation  It is possible to implement any boolean expression using only NAND gates XX NOT AND A B A.B OR A A+B B

Truth Tables and Boolean Notation NAND Gate representation  Implement the following circuit using only NAND gates x3 x2 x4 De Morgan can also be represented visually:

Solution Dual the gates, remember two nots together can be removed. x3 x2 x4 A B A.B A A+B B AND feeding OR

Exercise Implement NOT, AND and OR using NOR gates Example AND gate dual circuit:

Solution Similar pattern to using NAND gates (not surprising) NOT AND OR XX A B A.B A A+B B X X A B A.B A+B A A.B B

Truth Tables and Boolean Notation NOR Gate representation  It is also possible to implement any boolean expression using only NOR gates  Implement the following circuit using only NOR gates X4 X3 X2

Solution Two NOR gates in sequence acting as NOT’s can be eliminated: X4 X3 X2

Examples The half adder  The half adder is a circuit for adding two single bit numbers  Develop a truth table and Boolean expressions for the half adder S and C are the Sum and Carry ABSC 00 01 10 11

Half adder The sum is XOR operation and the carry an AND: ABSC 0000 0110 1010 1101 A B C S

Examples The full adder  Develop a truth table and Boolean expressions for the full adder, this circuit also includes a carry in. CinABSC 000 001 010 011 100 101 110 111 full adder A B Cin Sum Cout

Truth table for full adder CinABSCout 00000 00110 01010 01101 10010 10101 11001 11111 Exercise: Complete the Karnaugh maps for the Sum and the Carry out columns

K maps for sum and carry AB Cin 00011110 0 11 1 11 AB Cin 00011110 0 1 1 111 Sum – 1 when odd number of inputs is 1 = XOR gate Carry out - simplifies to 3 pairs Sum = Cin xor A xor B Cout = A.B + A.Cin + B.Cin

Full adder circuit A B Cin Cout Sum Sum = Cin xor A xor BCout = A.B + A.Cin + B.Cin

Examples The Multiplexer  Selects one of 2 n inputs and copies it to a single output  The selected line is determined from the bit combination (address) on the n selection lines  e.g. 1 from 2 mutiplexer 000000 001001 010010 011011 100100 101101 110110 111111 selabout sel ab 00011110 0 1 out = a b sel out n = 1 0 1

2:1 Multiplexer selabout 0000 0010 0101 0111 1000 1011 1100 1111 selabout 00?0 01?1 1?00 1?11 if a is selected, don’t care about b. AB sel00011110 011 111

K map for 2:1 Multiplexer AB sel00011110 0 11 1 11 output = sel.a + sel.b Principal can be extended to 4:1 – 2 select lines and 4 data lines 8:1 – 3 select lines and 8 data lines and so on… data sel out

What you should be able to do: Change circuits using one set of gates (eg AND, OR, NOT) to their equivalent using NAND or NOR gates only (and vice versa). Be familiar with half-, full- adders and multiplexer circuits. Be able to construct and interpret Karnaugh maps with up to 4 input variables. (if you need practice, come to the tutorial)

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