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Logic Synthesis by Branch and Bound A C++ Program Aditya Prasad.

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Presentation on theme: "Logic Synthesis by Branch and Bound A C++ Program Aditya Prasad."— Presentation transcript:

1 Logic Synthesis by Branch and Bound A C++ Program Aditya Prasad

2 What is the program’s goal? The program should be able to: Synthesize arbitrary Boolean functions Use a user-defined gate library It should be: Fast Flexible Optimal

3 How does it work? Depth-first search branch-and-bound design Recursive function adds a gate and recurses, for each pair of existing gates Bounds when A) Reaches pre-defined gate limit B) Determines that it is on a non-optimal path C) It sees symmetrical solutions

4 What are its inputs? Takes a file from a cmd-line argument: Gate library specification (choose from NAND, AND, NOR, OR, XOR, XNOR, IMP, NOT) Number of inputs (up to 5 currently) Number of desired outputs List of desired outputs, in horizontal truth-table format, including don’t-cares e.g.: 0 1 1 1 specifies 2-bit OR X X X 0 specifies all 2-bit functions with fn(1,1) = 0

5 What are its outputs? Produces text output to file showing each gate’s inputs e.g.: 2: 0 NAND 1 Produces output in.gvz format, to be used as input to AT&T’s GraphViz program. GraphViz can produce.ps output.

6 Sample output: 2-bit full adder

7 Timing results Version 13, using NAND only, was VERY slow… function #22 took over 8 hours, and didn’t finish Version 13 with AND, NAND, NOR took 531 sec. for #22, 8 hours overall Version 15 using same lib, took 20 sec for #22, only 15 min overall Version 16 now takes 1 second, and 11 seconds overall

8 Version13 timing results

9 Version15 timing results

10 Implemented speed-ups Version 14 checked the gate fan-outs Version 15 checked directed paths to each gate Version 16 uses the Implication gate and XOR/XNOR, all of which are VERY useful

11 Larger inputs 3-input now takes 13 seconds overall with the gate lib. 4-input and 5-input take VERY long for several reasons… Each function should take many more gates? Increase in number of gates causes exp. time increase

12 Potential speedups Bounding on same collections of gates Increasing the gate library to include more gates Restricting the gate library to the most useful gates

13 Questions?


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