# 05/03/2009CA&O Lecture 8,9,10 By Engr. Umbreen sabir1 Computer Arithmetic Computer Engineering Department.

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05/03/2009CA&O Lecture 8,9,10 By Engr. Umbreen sabir1 Computer Arithmetic Computer Engineering Department

05/03/2009CA&O Lecture 8,9,10 By Engr. Umbreen sabir2 MIPS Floating Point Instructions  Use special registers \$f0… \$f31. For double precision \$f0, \$f2,.. \$f30 (which are in fact pairs of registers).  The advantage of having separate registers for floating point operations – we have twice as many registers available and  We maintain the same number of bits in the instruction format.  Disadvantage – need more instructions – need special instructions to load words into the floating point registers.

05/03/2009CA&O Lecture 8,9,10 By Engr. Umbreen sabir3 MIPS Floating Point Instructions R2000 CPU

05/03/2009CA&O Lecture 8,9,10 By Engr. Umbreen sabir4 MIPS Floating Point Instructions  Floating point registers have special load and store instructions, but still use integer registers to store the base address for the loaded word  load word in coprocessor 1 lwc1 \$f1, 100(\$s2) # \$f1=memory[\$s2+100]  store word from coprocessor 1 swc1 \$f1, 100(\$s2) # memory[\$s2+100]=\$f2  there are move instructions to move data between integer and floating point registers  mtc1 \$t1, \$f5 #moves \$t1 into \$f5  mfc1.d \$t2, \$f2 #moves \$f2, \$f3 into \$t2, \$t3

05/03/2009CA&O Lecture 8,9,10 By Engr. Umbreen sabir5 MIPS Floating Point Instructions  The suffix.s or.d in an instruction specifies it is floating point..s if it is single and.d if it is double precision. add.s \$f1, \$f4, \$f5 # \$f1=\$f4+\$f5 sub.s \$f2, \$f4, \$f6 # \$f2=\$f4-\$f6 mul.s \$f2, \$f4, \$f6 # \$f2=\$f4x\$f6 div.s \$f2, \$f4, \$f6 # \$f2=\$f4/\$f6  To load two floating point numbers, subtract them and place the result into memory the code is lwc1 \$f4, 100(\$s2) #loads a 32-bit floating point number into \$f4 lwc1 \$f6, 200(\$s2) #loads another 32-bit floating point number into \$f6 sub.s \$f10, \$f4, \$f6 #\$f10=\$f4-\$f6 swc1 \$f10, 240(\$s2) #store 32-bit floating point into memory

05/03/2009CA&O Lecture 8,9,10 By Engr. Umbreen sabir6 MIPS Floating Point Instructions  Flow operations also have floating point variants  Compare less than single and Compare less than double c.lt.s \$f2, \$f4 #if \$f2<\$f4 condition=true, otherwise condition bit is false c.lt.d \$f2, \$f4 #compare in double precision  R-type instruction  Other conditions can also be tested (eq, ne, gt, etc.)  Floating point has branch operations based on the state of the “condition” bit  Branch if FP comparison is true (true==1)  bc1t 25 #jump to address PC+4+100 if true  Branch if FP comparison is false (true==0) bc1f 100 #jump to address PC+4+400 if false  I-type instructions

05/03/2009CA&O Lecture 8,9,10 By Engr. Umbreen sabir7 Basic Addition Algorithm  For addition (or subtraction) there are specific steps that are taken to make sure the proper digits are added:  (1) the decimal (or binary) point has to be aligned  (2) this means that the significand of the smaller number is shifted to the right until the decimal points are aligned.  (3) then the addition of the significand takes place  (4) the result needs to be normalized, which means the decimal point is shifted left and exponent increases.  (5) the result needs to be truncated to available number of digits and round off (add 1 to the last available digit if number to the right is 5 or larger)

05/03/2009CA&O Lecture 8,9,10 By Engr. Umbreen sabir8 Basic Addition Algorithm  Addition example  add 9.99910 1 and 0.161010 0  first shift to align decimal point 0.0161010 1  then truncate 0.01610 1  then add 9.99910 1 + 0.01610 1 10.01510 1  after normalization 1.001510 2  after rounding 1.00210 2

05/03/2009CA&O Lecture 8,9,10 By Engr. Umbreen sabir9 Arithmetic Unit for FP addition Subtract to determine which is smaller Output the larger exponent Significand of the smaller number Significand of the larger number Add significands Final result Round off significand

05/03/2009CA&O Lecture 8,9,10 By Engr. Umbreen sabir10 Extra Bits for rounding IEEE 754 allows the use of guard and round bits added to the allowed number of bits to reduce round-off errors How many extra bits? IEEE: As if computed the result exactly and rounded.  Guard Digits: digits to the right of the first P digits of significand to guard against loss of digits – can later be shifted left into first P places during normalization.  Addition: carry-out shifted in  Subtraction: borrow digit and guard  Multiplication: carry and guard, Division requires guard  Sticky bit is set to 1 if there are nonzero bits to the right of the round bit –helps deal with rounding numbers like 2.345

05/03/2009CA&O Lecture 8,9,10 By Engr. Umbreen sabir11 Extra Bits for rounding Exercise add numbers 8.76 10 1 and 1.47 10 2 with only three allowed significand digits: a) use guard and round digits; b) do not use these two digits a) We extend the numbers with the two digits 8.7600 10 1 and align 0.87600 10 2 and 1.4700 10 2 Then we add the significands 0.8760 + 1.4700 2.3460 After rounding off to three significand digits 2.35 10 2 b) Without guard and round digits 0.87 + 1.47 2.34 or 2.34 10 2 Results differ

05/03/2009CA&O Lecture 8,9,10 By Engr. Umbreen sabir12 Using the sticky bit in rounding Exercise add numbers 5.01 10 -1 and 1.34 10 2 with only three allowed significand digits: a) use guard, round bits and sticky bits; b) use only guard, round bits a) We extend the numbers with the two digits 5.0100 10 -1 and align 0.0050100 10 2 and 1.3400 10 2 Then we add the significands 0.0050 + 1.3400 1.3450 After rounding off to three significand digits 1.35 10 2 because sticky bit was 1 b) Without sticky bit result is 1.34 10 2 Results differ

05/03/2009CA&O Lecture 8,9,10 By Engr. Umbreen sabir13 Floating Point Multiplication  Biased exponents are added then one bias is subtracted  1.110 10 10 x 9.200 10 -5  New exponent is 10-5=5  when using bias 137 (which is 10+127) + 122 (is -5+127)-127=132  Significands are multiplied 10.212000 ten  Unormalized product is 10.212 ten 10 5 Normalized is 1.0212 ten 10 6. Rounded to four digits 1.021 ten 10 6  Sign is determined by the sign of both operands + 1.021 ten 10 6

05/03/2009CA&O Lecture 8,9,10 By Engr. Umbreen sabir14 Exercise A single-precision IEEE number is stored at memory address X. Write a sequence of MIPS instructions to multiply the number at X by 2 and store the results back at location X. Accomplish this without using any floating point instructions (Don’t worry about overflow). a) Multiplying by 2 is same as adding 1 to the exponent field 0 1000 0100 1000….. 0 23 bits \$t0 0 0000 0000 0000….. 1 23 bits \$s0 after addi tion lw \$t0, X(\$0) addi \$s0, \$0, 1 sll \$s0, \$s0, 23 addu \$t0, \$t0, \$s0 sw \$t0, X(\$0)

05/03/2009CA&O Lecture 8,9,10 By Engr. Umbreen sabir15 Exercise X=0100 0110 1101 1000 0000 0000 0000 two and Y=1011 1110 1110 0000 0000 0000 0000 two represent single-precision IEEE 754 floating point numbers. a)What is x + y ? b)What is x * y ? a) Remember that 18 bits23 bits sign Signed exponent mantissa: sign + magnitude, normalized binary significand SE M Convert +1.1011*2 14 + –1.11*2 –2 1.1011 0000 0000 0000 0000 000 –0.0000 0000 0000 0001 1100 000 –1.1010 1111 1111 1110 0100 000 0100 0110 1101 0111 1111 1111 0010 0000

05/03/2009CA&O Lecture 8,9,10 By Engr. Umbreen sabir16 Exercise - continued b) What is x * y ? First we calculate a new exponent 111 11 1 100 01101 +011 11101 1000 01010 –011 11111 minus bias 1111 100 01011 new exponent Then we multiply ×1.101 1000 0000 0000 0000 0000 the significands 1.110 0000 0000 0000 0000 0000 1 11 11 1 1011 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 11 0110 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 +1.10 1100 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 10.11 1101 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000

05/03/2009CA&O Lecture 8,9,10 By Engr. Umbreen sabir17 Exercise - continued Normalize and round: exponent 100 0110 0 significand 1.011 1010 0000 0000 0000 0000 Signs differ, so result is negative: 1100 0110 0011 1010 0000 0000 0000 0000

05/03/2009CA&O Lecture 8,9,10 By Engr. Umbreen sabir18 Exercise IA-32 uses 82-bit registers, allowing 64-bit significands and 16-bit exponents: -what is the bias in the exponent? -Range of numbers? -How much greater accuracy compared to double precision? a)There are 15 bits available for the exponent size, thus bias is 2 15 -1 = 32767 ; a) range of numbers is 2.0 x 10 –9864 to 2.0 x 10 9864 b) accuracy is 20% better double precision range was 2.0 ten x10 -308 to 2.0 ten x10 308 so range is 32 times larger (9834/308)

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