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COE 202: Digital Logic Design Combinational Circuits Part 1 Dr. Ahmad Almulhem Email: ahmadsm AT kfupm Phone: 860-7554 Office: 22-324 Ahmad Almulhem, KFUPM.

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Presentation on theme: "COE 202: Digital Logic Design Combinational Circuits Part 1 Dr. Ahmad Almulhem Email: ahmadsm AT kfupm Phone: 860-7554 Office: 22-324 Ahmad Almulhem, KFUPM."— Presentation transcript:

1 COE 202: Digital Logic Design Combinational Circuits Part 1 Dr. Ahmad Almulhem ahmadsm AT kfupm Phone: Office: Ahmad Almulhem, KFUPM 2009

2 Objectives Logic Circuits Combinational Sequential Design Procedure Examples Ahmad Almulhem, KFUPM 2009

3 Introduction Logic circuits have two classes: Combinational Circuits Sequential Circuits Combinational circuits consist of logic gates with inputs and outputs The outputs at any instance of time depend only on the combination of the input values based on logic operations such as AND, OR etc. Sequential circuits, in addition to inputs and outputs also have storage elements, therefore the output depends on both the current inputs as well as the stored values Ahmad Almulhem, KFUPM 2009

4 Combinational Circuits Combinational Circuit n inputsm outputs A Combinational Circuit Ahmad Almulhem, KFUPM 2009 A combinational circuit has: A set of m Boolean inputs, A set of n Boolean outputs, and n switching functions, each mapping the 2 m input combinations to an output such that the current output depends only on the current input values

5 Design Procedure 1.Specification Write a specification for the circuit if one is not already available Specify/Label input and output 2.Formulation Derive a truth table or initial Boolean equations that define the required relationships between the inputs and outputs, if not in the specification Apply hierarchical design if appropriate 3.Optimization Apply 2-level and multiple-level optimization (Boolean Algebra, K-Map, software) Draw a logic diagram or provide a netlist for the resulting circuit using ANDs, ORs, and inverters Ahmad Almulhem, KFUPM 2009

6 Design Procedure (Cont.) 4.Technology Mapping Map the logic diagram or netlist to the implementation technology selected 5.Verification Verify the correctness of the final design manually or using simulation Ahmad Almulhem, KFUPM 2009

7 Practical Considerations Cost of gates (Number) Maximum allowed delay Fanin/Fanout Ahmad Almulhem, KFUPM 2009

8 Example 1 Question: Design a circuit that has a 3-bit input and a single output (F) specified as follows: - F = 0, when the input is less than (5) 10 - F = 1, when the input is greater than (5)10 Solution: Step 1: Label the inputs (3 bits) as X, Y, Z X is the most significant bit, Z is the least significant bit The output of the circuit is high when input is greater than (101) 2. Therefore, output will be logic 1 for the input combinations: (101) 2, (110) 2, (111) 2 The output will be logic 0 for the other inputs Ahmad Almulhem, KFUPM 2009

9 Example 1 Step 2: Truth table is defined for this function as: XYZF X YZ Step 3: Minimization F = XZ + XY XZXZ XYXY F Step 4: Circuit Design Ahmad Almulhem, KFUPM 2009

10 Example 2: Code Converters Code converters convert from one code to another. e.g. BCD to Excess-3 code The inputs are defined by the code that is to be converted BCD for this example (How long is the input?) The outputs are defined by the converted code. Excess-3 for this example Design a BCD-to-Excess-3 Code Converter. Excess-3 code is a decimal digit plus three converted into binary. 0 is 0011, 1 is 0100, etc. Ahmad Almulhem, KFUPM 2009

11 Example 2: BCD to Excess-3 Converter (Formulation/Truth Table) BCD InputExcess 3 Output DecimalABCDWXYZ All other inputsXXXX Ahmad Almulhem, KFUPM 2009

12 Example 2: BCD to Excess-3 Converter (Optimization) AB X X 1 1 X X CD W AB X X 0 1 X X CD X AB X X 1 0 X X CD Y AB CD Z X X 1 0 X X Ahmad Almulhem, KFUPM 2009

13 Example 2: BCD to Excess-3 Converter (Circuit) W = A + BC + BD X = B’C + BC’D’+B’D Y = CD + C’D’ Z = D’ Ahmad Almulhem, KFUPM 2009

14 Example 3: BCD to 7 Segment Display Controller (Description) This display controller is used in devices such as digital watches to display digits Each digit consists of 7 segments (C0, C1,…C6) The segments are Light Emitting Diodes (LEDs), which light up whenever the value of the segment is 1, and are off when the value of the segment is 0 C0 C1 C2 C3 C4 C5 C6 Example: 7 is displayed by setting C0=C1=C2 = 1 Ahmad Almulhem, KFUPM 2009

15 Example 3: BCD to 7 Segment Display Controller (Specification) Step 1: Specify the inputs and the outputs for the circuit 4 inputs (A, B, C, D) 7 outputs (c0, c1, c2, c3, c4, c5, c6) Invalid inputs (BCD greater than 1001) will turn off all display LEDs (all zeroes) Ahmad Almulhem, KFUPM 2009

16 Example 3: BCD to 7 Segment Display Controller (Formulation/Truth Table) BCD INPUT7 SEGMENT OUTPUT DecimalABCDC0C1C2C3C4C5C All Other Inputs Ahmad Almulhem, KFUPM 2009

17 Example 3: BCD to 7 Segment Display Controller (Optimization) AB C0 AB C2 AB C3 AB C1 CD Ahmad Almulhem, KFUPM 2009

18 Example 3: BCD to 7 Segment Display Controller (Optimization) AB C4 AB C5 AB C6 CD Ahmad Almulhem, KFUPM 2009

19 Example 3: BCD to 7 Segment Display Controller (Optimization) C0 = A’C + A’BD + AB’C’ + B’C’D’ C1 = A’B’ + A’C’D’ + A’CD + B’C’ C2 = A’B + B’C’ + A’C’ + A’D C3 = A’CD’ + A’B’C + B’C’D’+AB’C’+A’BC’D C4 = A’CD’ + B’C’D’ C5 = A’BC’ + A’C’D’ + A’BD’ + AB’C’ C6 = A’CD’ + A’B’C + A’BC’ + AB’C’ Ahmad Almulhem, KFUPM 2009

20 Conclusion There are two types of logic circuits Combinational Sequential Design Procedure Specification * Formulation * Optimization * Technology Mapping Verification Examples Ahmad Almulhem, KFUPM 2009


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