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© 2010 Renesas Electronics Europe. All rights reserved. 1 SH726x Series for HMI.

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1 © 2010 Renesas Electronics Europe. All rights reserved. 1 SH726x Series for HMI

2 © 2010 Renesas Electronics Europe. All rights reserved. 2 SH726x - Key Target Markets and Applications Surveillance Rear Camera Video Doorbell Human Machine Interface Digital Audio/Video Devices Handheld Devices Vending Machines Lowest Cost Linux Systems Lowest Cost OpenVG HMI Key Selling Points Huge internal SRAM upto 2.5 MByte CMOS Camera Interface + PAL/NTSC decoder Excellent Performance&Integration to BOM cost ratio

3 © 2010 Renesas Electronics Europe. All rights reserved. 3 SH7262 and SH7264 in Detail High Efficient 32-Bit CPU Core 144 MHz CPU Clock Frequency 2 Execution Units delivering 356 Dhrystone MIPS Single and Double Floating Point Unit compliant with IEEE754 Accelerates e.g. trigonometric operations like rotation High-Density up to 1 MByte internal RAM 1 Bus cycle access time Support for Booting from SPI Flash Memory and NAND Flash Memory External SPI serial flash is extremly cheap compared to onChip Flash Very flexible: 128Kbit - 512Mbit serial Flash LCD Controller VGA and 16 bit interface 2 Layers available for overlaying image over image alpha blending CMOS Camera Sensor Interface Bus Interface Controller for glue less connection of SRAM, SDRAM, NOR Flash Memory 16KB cache USB 2.0 Host and Function Controller with integrated USB Transceiver Up to 2 CAN channels Low Current Consumption Normal operation: Typ 100 mA Sleep mode: typ. 60 mA Standby mode: typ. 0.5 mA Deep standby mode: typ 0.5 uA Package 176-pin QFP (SH7262) 208-pin QFP (SH7264) 64kB URAM SH-2A CPU+FPU 1M or 640k SRAM 8ch 10-Bit ADC 16ch DMA USB 8ch SCIF CMT 2ch CAN 3ch I 2 C MTU2 + 16ch PWM2ch RSPI Watchdog UBC AUD H-UDI I/O pins 16kB cache 16-Bit 72MHz BSC SH7264/2 block diagram SD Card Interface RTC Video Display controller with Camera Interface

4 © 2010 Renesas Electronics Europe. All rights reserved. 4 SH7266 and SH7267 in Detail High Efficient 32-Bit CPU Core 144 MHz CPU Clock Frequency 2 Execution Units delivering 356 Dhrystone MIPS Single and Double Floating Point Unit compliant with IEEE754 Accelerates e.g. trigonometric operations like rotation High-Density up to 1.5 MByte internal RAM 1 Bus cycle access time Support for Booting from SPI Flash Memory and NAND Flash Memory New Approach. lot of SRAM instead of FLASH External SPI serial flash is extremly cheap compared to onChip Flash Very flexible: 128Kbit - 512Mbit serial Flash LCD Controller VGA and 16 bit interface 2 Layers available for overlaying image over image alpha blending CMOS Camera Sensor Interface 27 MHz ITU.BT 601/650 (PAL/NTSC) Bus Interface Controller for glue less connection of SRAM, SDRAM, NOR Flash Memory 16KB cache USB 2.0 Host and Function Controller with integrated USB Transceiver Up to 2 CAN channels Low Current Consumption Normal operation: Typ 60 mA Sleep mode: typ. 35 mA Standby mode: typ. 1 mA Deep standby mode: typ 3 uA Package 144-pin QFP (SH7266) 176-pin QFP (SH7267) Timers MTU2 16-Bit x 6ch WDT 8-bit 1 ch Communication USB2.0 HS 1ch CAN 2ch External Bus 16bit ROM, SRAM, SDRAM, PCMCIA RSPI 2ch 8ch SCIF I2C IEBus 3ch 1ch SIOF SSI(I2S) 1ch 4ch SDHI 1ch Analogue ADC 10bit 6ch Memory URAM 64kB SRAM 1.5MB cache 8kB + 8kB System Interrupt Cont. Data Management DMAC 16ch Clock Generation PLL IRC UBC / H-UDI System CMT 16-bit 2 ch PWM Timer. 16 ch Real-Time CLK Graphics Video Display Controller w./ camera i/f

5 © 2010 Renesas Electronics Europe. All rights reserved. 5 SH7268 and SH7269 in Detail High Efficient 32-Bit CPU Core 266 MHz CPU Clock Frequency 2 Execution Units delivering 640 Dhrystone MIPS Single and Double Floating Point Unit compliant with IEEE754 Accelerates e.g. trigonometric operations like rotation High-Density up to 2.5 MByte internal RAM 1 Bus cycle access time Parallel bus structure dedicated to SRAM 2D-Graphics Engine(RGPVG): OpenVG 1.1 Full support for Khronos OpnVG1.1 API Reendering, Animation and Acceleration OpenVG w/o CPU Support for Booting from QSPI Flash Memory and NAND Flash Memory New Approach. lot of SRAM instead of FLASH External SPI serial flash is extremly cheap compared to onChip Flash Very flexible: 128Kbit - 512Mbit serial Flash LCD Controller SVGA with 24 bit interface 3 layer overlay Dot and window Alpha Blending Chroma Keying CMOS Camera Sensor Interface 27 MHz ITU.BT 601/650 (PAL/NTSC) Bus Interface Controller for glue less connection of SRAM, SDRAM, NOR, NAND, eMMC Flash Memory 16KB cache USB 2.0 Host and Function Controller with integrated USB Transceiver Up to 3 CAN channels Package SH pin QFP(0.5mm) SH pinBGA(0.8mm) / 256pin QFP(0.4mm) Timers MTU2 16-Bit x 6ch WDT 8-bit 1 ch Communication USB2.0 HS 1ch CAN 3ch External Bus 32bit ROM, SRAM, SDRAM, PCMCIA RQSPI SPI multi 2ch 1ch SCIF RSPI 5-8ch 2ch I2C IEBus 2-4ch 1ch SIOF SSI(I2S) 1ch 4ch SDHI 1ch Analogue ADC 10bit 6/8ch Memory URAM 64kB SRAM 2.5MB cache 8kB + 8kB System Interrupt Cont. Data Management DMAC 16ch Clock Generation PLL IRC UBC / H-UDI System CMT 16-bit 2 ch PWM Timer. 16 ch Real-Time CLK Graphics Video Display Controller w./ camera i/f RGPVG OpenVG 1.1 PAL/NTSC decoder

6 © 2010 Renesas Electronics Europe. All rights reserved. 6 Standard MCU SuperH MCU SH726x Family – Lowest BOM cost HMI solution from Renesas NOR Flash RAM Graphics Driver IC Graphics Driver IC Multilayer PCB for BGA package SH726x incorporates LCD driver capability => save up to €2 SH726x incorporates up to 2.5MB of SRAM => save up to €1.5 SH726x boots from SPI flash (no need for NOR)=> save up to €0.5 SH726x in a QFP package for lower cost PCB => save up to €1 Could you save up to 4.5€ on your HMI application? * Prices are approximations and could vary depending your application SPI Flash 2 layer low cost PCB

7 © 2010 Renesas Electronics Europe. All rights reserved. 7 Large Internal SRAM – The Advantage CPU is booting from internal FLASH CPU is operating from internal FLASH and SRAM Everything in one package but inflexible in terms of memory size CPU is booting from external FLASH CPU is operating from external FLASH and SRAM Very flexible but high BOM cost and complicated PCB design CPU is booting from external serial SPI FLASH CPU is operating from internal SRAM only Most flexible, very low cost BOM, easiest PCB design due to low pin count SPI memory and QFP Package of the micon

8 © 2010 Renesas Electronics Europe. All rights reserved. 8 On-chip large-capacity RAM

9 © 2010 Renesas Electronics Europe. All rights reserved. 9 Internal SRAM with 2.5Mbyte capacity Due to big SRAM - same easy usage as a FLASH device Booting from a real low cost serial SPI Flash < 0.20€ After boot forget the serial Flash –> work from internal SRAM After boot a it’s a real one Chip Solution – no external RAM, no NOR, no NAND Lower BOM and PCB costs QFP package allows 2 layer PCBs smaller PCBs due to reduced external components Smaller failure rates due to reduced external components Enhanced Graphics performance enough SRAM for double frame buffers, video buffer and program code OpenVG 1.1 Vector Graphics Accelelerator – fully compliant to Khronos API SVGA LCD controller with 3 layers for alpha blending and chroma keying blending CMOS camera interface for video recording Others Good connectivity with USB, CAN and IEBUS Good family concept w & w/o CAN & IEbus and 2 different memory configurations Its a lot of SRAM onCHIP BUT its cheaper than expected Key arguments

10 © 2010 Renesas Electronics Europe. All rights reserved. 10 Tools

11 © 2010 Renesas Electronics Europe. All rights reserved. 11 Renesas Starter Kit2+ for SH7264 Partnumber: R0K572643S000BE

12 © 2010 Renesas Electronics Europe. All rights reserved. 12 HEW Development Environment and Sample Code Inside the Renesas Starter Kit2+ for SH7264 Renesas High Performance Embedded Workshop Graphical IDE Renesas C/C++ Compiler Sample Code Projects to test all available peripherals New API like peripheral driver library that allows easily test and access all the peripherals of SH7264 without writing own code for it from scratch and reduces datasheet look-ups by 80 percent. Free TCP uIP Stack with all the required protocols and a lightweight web server Free USB stack Free FAT File System Linux BSP

13 © 2010 Renesas Electronics Europe. All rights reserved. 13 Renesas SH2A optimized Audio library AAC, MP3 and WMA highly optimzed library SH7264 is clocked with 144Mhz. AAC encode/decode CPU load for 2 channel audio: 30-50Mhz MP3 encode/decode CPU load for 2 channel audio: 40-50Mhz WMA decode CPU load for 2 channel audio: 40-50Mhz CPU load for decode or encode is below 30 percent Compact Size MP3 Decoder: RAM about 103KB AAC Decoder: RAM about 124KB WMA Decoder: RAM about 186KB Library utilizing SH2A Floating Point Unit Improved Audio Quality

14 © 2010 Renesas Electronics Europe. All rights reserved. 14 Segger emWIN Window & WidgetsDrop-Down Widget Graphing Widget & Line Drawing Alpha Blending emWin is an efficient graphical user interface (GUI) for any application that operates with a graphical LCD. It is compatible with single-task and multitask environments Proprietary operating system (emBOS) Any commercial RTOS (ucOS-II) emWin is shipped as "C" source code. A complete ready to use EmWin+EmbOS BSP for SH7264 RSK is available under:

15 © 2010 Renesas Electronics Europe. All rights reserved. 15 HMI solution providers for SH726x family

16 © 2010 Renesas Electronics Europe. All rights reserved. 16 Renesas SH2A optimized JPEG library Very useful for MotionJPEG (MJPEG) animations MJPEG is commonly known on picture cameras for video recording JPEG Compression by Base-line Method Compress & Expand Full Color Data (24-bit/pixel) by about 1/10 to 1/20 Conversion Speed Compression: About 0.37 Second Expansion: About 0.28 Second Sampling Ratio: Y : Cb : Cr = 4:1:1 VGA(640dots x 480dots x 3): About 460,000 Pixels Compact Size Encode: ROM about 4.4KB / RAM about 1.2KB Decode: ROM about 4.4KB / RAM about 4.7KB SH2A CPU could be used for MJPEG en- and decoding compress video stream from external camera to allow proper storage playback of MJPEG video from other sources

17 © 2010 Renesas Electronics Europe. All rights reserved. 17 OpenVG Layer Hierarchy OpenVG Engine OpenVG Lib Application Parser/Converter Display OutputRAM OS / Non OS RenderingDisplay ControlMemory Management OpenVG image is written in C language Physical OS API Appli. Authoring tools like Adobe CS or Electrobit can be used to create SVG files for conversion to OpenVG This Library coming from Renesas. This library provide standart OpenVG API for applications which make use of the SH7268/9 OpenVG Accelerator.

18 © 2010 Renesas Electronics Europe. All rights reserved. 18 SuperH Visualisation Eco System

19 © 2010 Renesas Electronics Europe. All rights reserved. 19 Processor Platinum Partners emtrion GmbH System Integrator Services Official Partner of MS, QNX Offers starter kits. Emtrion HiCO.SH3 Emtrion HiCO.SH7760/80 emtrion GmbH Greschbachstr.12, Karlsruhe Phone: GERMANY MPC SH7712 MPC Data Ltd. System Integrator Services Official Partner for MS, MV, etc Runs shlinux.com MPC EDOSK7760/80 MPC Data Limited County Gate, County Way Trowbridge, BA14 7FJ, Wiltshire UK Phone: +44 (0) 1225

20 © 2010 Renesas Electronics Europe. All rights reserved. 20 Processor Platinum Partners Ivrea Sistemi Srl System Integrator Services Excellent Renesas MCU/MPU experience. Contact:

21 © 2010 Renesas Electronics Europe. All rights reserved. 21 Processor Software Partners Applied Informatics Excellent SuperH experience Embedded&Enterprise Linux Experts Founder and maintainer of the POCO application framwork Located in Austria, Carinthia TES GUI Design House High Class GUI Guilliani

22 Renesas Electronics Europe © 2010 Renesas Electronics Europe. All rights reserved.


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