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Bit grouping for IEEE m CTC Document Number: IEEE C802.16m-09/0670 Date Submitted: Source: Seunghyun Kang, Sukwoo Lee {sh_kang, LG Electronics Re:IEEE m-09/0012, “Call for Contributions on Project m Amendment Working Document (AWD) Content”. Target topic: “Channel Coding” Venue: IEEE Session #60, Vancouver, BC, Canada Purpose: To be discussed and adopted in the Amendment Working Document Notice: This document does not represent the agreed views of the IEEE Working Group or any of its subgroups. It represents only the views of the participants listed in the “Source(s)” field above. It is offered as a basis for discussion. It is not binding on the contributor(s), who reserve(s) the right to add, amend or withdraw material contained herein. Release: The contributor grants a free, irrevocable license to the IEEE to incorporate material contained in this contribution, and any modifications thereof, in the creation of an IEEE Standards publication; to copyright in the IEEE’s name any IEEE Standards publication even though it may include portions of this contribution; and at the IEEE’s sole discretion to permit others to reproduce in whole or in part the resulting IEEE Standards publication. The contributor also acknowledges and accepts that this contribution may be made public by IEEE Patent Policy : The contributor is familiar with the IEEE-SA Patent Policy and Procedures: and.http://standards.ieee.org/guides/bylaws/sect6-7.html#6http://standards.ieee.org/guides/opman/sect6.html#6.3 Further information located at and.http://standards.ieee.org/board/pat/pat-material.htmlhttp://standards.ieee.org/board/pat

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CTC Bit grouping method in IEEE e 16e bit grouping procedure All of the encoded bits are demultiplexed into six subblocks denoted A, B, Y1, Y2, W1, and W2. The six subblocks are interleaved separately by using the same subblock interleaver. The output sequence of the bit grouping consists of the interleaved A and B subblock sequence, followed by a bit-by-bit multiplexed sequence of the interleaved Y1 and Y2 subblock sequences, followed by a bit-by-bit multiplexed sequence of the interleaved W1 and W2 subblock sequences

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CTC Bit grouping method in IEEE e Block diagram

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CTC Bit grouping method in IEEE e Unevenly distributed bit reliabilities In the case of using high order modulation(16QAM or 64QAM), the codeword sequence is mapped onto 2 or 3 bit reliabilities depending on the modulation order. On the decoder point of view, the legacy bit grouping method unevenly distributes the bit reliabilities of the systematic bits along whole decoding trellis transitions.

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Proposed Bit grouping method for IEEE m CTC Simple modification of 16e bit grouping method The interleaved sequence of the sub block B is circularly shifted to the left once. The output sequence of the proposed bit grouping consists of the interleaved A and B Shift subblock sequence, followed by a bit-by-bit multiplexed sequence of the interleaved Y1 and Y2 subblock sequences, followed by a bit-by-bit multiplexed sequence of the interleaved W1 and W2 subblock sequences.

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Proposed Bit grouping method for m CTC Block diagram

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Proposed Bit grouping method for m CTC Bit reliability comparison on the decoder point of view Example with N EP =48 and 16QAM For each subblock, the following table shows the bit reliability values of 24-bit subblock sequence. ‘0’ represents low bit reliability and ‘1’ represents low bit reliability A’ and B’ means the bit reliability values after CTC inner interleaving ‘Sum’ shows the sum of the bit reliability values for each decoding trellis transition. As shown in the table, the proposed bit grouping method evenly distributes the bit reliabilities along whole decoding trellis transitions Subblocks Bit Reliability 16e Bit groupingProposed Bit grouping DEC #1 A B Sum DEC #2 A’ B’ Sum

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Simulation assumption MCS table MCS indexModulationCode rate 0QPSK31/256 1QPSK48/256 2QPSK71/256 3QPSK101/256 4QPSK135/256 5QPSK171/ QAM102/ QAM128/ QAM155/ QAM184/ QAM135/ QAM157/ QAM181/ QAM205/ QAM225/ QAM237/256

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Simulation assumption FEC block sizes N EP 960, 1000 Codeword size Bit grouping methods Option-116e Bit grouping method [1] Option-2 Bit grouping method from Huawei, Samsung and MediaTek joint proposal [2] Option-3Proposed bit grouping method Decoding algorithm Max-Log-MAP decoding with - 8 decoding iterations - Scaling factor: 0.75 MCS 10 MCS levels have been used. - MCS indices of 6~15 in the MCS table ChannelAWGN

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Simulation result with N EP = 960

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Simulation result with N EP = 1000

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Simulation result with N EP = 1920

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Conclusion Comparing to Option-1 IEEE e Bit grouping method, According to above comparisons, we propose Option-3 bit grouping method for IEEE m CTC. Option-2 [2]Option-3: Proposed method PerformanceCase N EP =960, - Better than Option-1 Case N EP =960, - Better than Option-1 - Almost same as Option-2 Case N EP =1000, - Almost same as Option-1 Case N EP =1000, - Almost same as Option-1 Case N EP =1920, - Better than Option-1 Case N EP =1920, - Better than Option-1 - Almost same as Option-2 Complexity (Additional Blocks) C-symbol permutation blocks for each subblock Depending on modulation order, different permutation patterns are used. Only one circular shift block for the interleaved B subblock sequence

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Reference [1] IEEE P Rev2/D9, “Draft IEEE Standard for Local and Metropolitan Area Networks: Air Interface for Broadband Wireless Access,” Jan [2]IEEE C802.16m 09/0665, “Proposed Text of CTC Bit grouping for IEEE m Amendment” Mar.2009

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Proposed Text Text Start x.x.x.x Bit grouping After subblock interleaving, the interleaved sequence of the sub block B is circularly shifted to the left once as follows. The output sequence of bit grouping shall consist of the interleaved A subblock sequence and B Shift subblock sequence followed by the bit-by-bit multiplexed sequence of Y1 and Y2 sub blocks, followed by the bit-by-bit multiplexed sequence of W1 and W2 subblock. The bit-by-bit multiplexed sequence of interleaved Y1 and Y2 subblock sequences shall consist of the first output bit from the Y1 subblock interleaver, the first output bit from the Y2 subblock interleaver, the second output bit from the Y1 subblock interleaver, the second output bit from the Y2 subblock interleaver, etc, The bit-by- bit multiplexed sequence of interleaved W1 and W2 subblock sequences shall consist of the first output bit from the W1 subblock interleaver, the first output bit from the W2 subblock interleaver, the second output bit from the W1 subblock interleaver, the second output bit from the W2 subblock interleaver, etc. Figure xxx shows the interleaving and the bit grouping scheme.

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Proposed Text Figure xxx. Block diagram of the interleaving and bit grouping scheme Text End

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