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Simulations of ‘Bottom-up’ Fill in Via Plating of Semiconductor Interconnects Uziel Landau 1, Rohan Akolkar 1, Eugene Malyshev 2, and Sergey Chivilikhin 2 1 Department of Chemical Engineering Case Western Reserve University Cleveland, OH 44106 and 2 L-Chem, Inc Beachwood, OH 44122

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Outline Significance and Objectives Significance and Objectives Parameters Controlling the Bottom-Up Fill Parameters Controlling the Bottom-Up Fill Simulation Method Simulation Method Sample Simulations Sample Simulations Conclusions Conclusions

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Prior Work Andricacos, Uzoh, Dukovic, Horkans and Deligianni, IBM J. R&D 1998: -Additives blocking model -Adjustable Parameters + steady-state additives diffusion Georgiadou, Veyret, Sani and Alkire, J. Electrochem. Soc. 2001: -Convective flow + additives transport Cao, Taephaisitphongse, Chalupa and West, J. Electrochem. Soc., 2001: -Diffusion controlled additives transport + adsorption isotherms Josell, Baker, Witt, Wheeler and Moffat, J. Electrochem. Soc., 2002: -Curvature enhanced SPS coverage

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Objectives Develop a Simulation for the Bottom-Up Fill Develop a Simulation for the Bottom-Up Fill Based on Experimental Data Based on Experimental Data Without Adjustable Parameters & Without Invoking Extreme Assumptions Without Adjustable Parameters & Without Invoking Extreme Assumptions Simulation should correlate experimental Simulation should correlate experimental observations observations

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Gap-Fill Modes Bottom-up Fill (Good!) Pinch Conventional Plating (unacceptable) Seam Conformal Plating ( unacceptable)

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Seam Void Fill ~ 2.5 min ~ 50 sec ~ 30 sec ‘Conventional’ Plating Conformal Plating Bottom-up Plating Stages in ‘Gap-Fill’

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Variable Adsorption leads to Variable Kinetics and to ‘Bottom-up’ fill: Suppressor, e.g. PAG Slow deposition Fast deposition ‘Enhancer’, e.g. Organic di-sulfide

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Variable Deposition Rates Due to Non-uniform Inhibition i [mA/cm 2 ] V Polarization Curves Enhanced Kinetics (via) Suppressed Kinetics (‘flat’ wafer) 10 300 mV 100

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< 50 Sec 2-3 Min Rapid Fill of Vias and Trenches

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Nernst-Plank Equation (ionic transport): Navier-Stokes Equation (fluid-flow–momentum balance): C (Boundary Layer) Transport Equations -- Electroneutrality: Z j C j = 0 Pseudo Steady -State Diffusion Electric Migration Convection

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Scaling Analysis of the Nernst Plank Equation*: Diffusion Electric Migration CbCb 2 = 0 Thin boundary layer Boundary conditions: Electrode: = V – E 0 – η a – η C Insulator: i = 0 (i = - κ ) = 0 Ohmic Control on the Macro-Scale Thin Boundary Layer Approximation 2 = 0 (Laplace’s eqn. for the potential is solved within the cell) * U. Landau, The Electrochem. Soc. Proceedings Volume 94-9, 1994.

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Scaling Analysis of the Nernst Plank Equation*: Diffusion Electric Migration CbCb 2 = 0 Mass Transport Control on the Micro-Scale 2 C = 0 (Laplace’s eqn. for the Concentration, solved in the boundary layer) Boundary conditions: Electrode: η C = V – E 0 – η a - outer edge of diffusion layer: y = C = C B Insulator: i = 0 (i = - κ ) C = 0 * U. Landau, The Electrochem. Soc. Proceedings Volume 94-9, 1994. Boundary layer

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The Software Package ‘ Cell-Design’ Features: Current Distribution + Fluid Flow (BEM + FD) Current Distribution: (BEM) Macro-scale: Micro-scale: Moving boundaries Variable Kinetics Fluid-Flow (FD): Complete solution of the Navier-Stokes equation Integrated with the electrochemical modeling Solution of the Nernst-Plank equation Export C Fast, Robust, Menu driven 2 C = 0 2 = 0 Boundary Element (BEM) Finite Differences (FD)

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Simulation of Deposit Propagation Variable kinetics + Moving boundaries 2 =0 2 C =0 i = f ( η) Passivated kinetics (PEG+SPS) [Measured, f(t)] Accelerated kinetics (SPS) Variable kinetics [Partially passivated, f(t)] Virtual electrode; Outer edge of diffusion layer CC

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Flow Simulations 60 RPM + 4 GPM Impinging Flow Wafer Scale ‘Cell-Design’ Simulations

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Flow Simulations Micro-Scale Transport within the via is due to diffusion ‘Cell-Design’ Simulations

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Concentration Map

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Activation Overpotential, a, [V] i [mA/cm 2 ] SPS (Stagnant) PEG (Stagnant) Steady-State Polarization Data

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Initial state Polarization Transients: PEG + SPS 50 s 20 s 10 sec 0 sec (PEG) SPS Steady- state Time

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Fast PEG transport to upper via sidewalls Slow PEG transport to the via-bottom PEG Penetration Depth Short time SPS coverage Short time PEG coverage

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Fast PEG transport to upper via sidewalls Slow PEG transport to the via-bottom PEG Penetration Depth Longer time PEG coverage Longer time SPS coverage Slow SPS depolarization

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SiO 2 2 sec 4 sec 8 sec 12 sec 16 sec 24 sec 32 sec 40 sec 44 sec Electrolyte 47 sec ‘Cell-Design’ Simulations Via Fill Simulation Fill Time: 47 sec. Overpotential: - 124 mV Bottom: i = 60 mA/cm 2 i 0 = 1.12 mA/cm 2 C = 0.83 Top & Sidewalls: i = 0.24 mA/cm 2 3.4 mA/cm 2 Depolarization by SPS: i 0 = 3.1 μA/cm 2 46 μA/cm 2 C = 0.9

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SiO 2 Electrolyte 2 sec 6 sec 16 sec 32 sec 10 sec 22 sec 42 sec 50 sec ‘Cell-Design’ Simulations Via Fill Simulation Fill Time: 49 sec. Overpotential: - 124 mV Bottom: i = 60 mA/cm 2 i 0 = 1.12 mA/cm 2 C = 0.83 Top & Sidewalls: i = 0.24 mA/cm 2 6.8 mA/cm 2 Depolarization by SPS: i 0 = 3.1 μA/cm 2 92 μA/cm 2 C = 0.9

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SiO 2 Electrolyte ‘Cell-Design’ Simulations SiO 2 Electrolyte 1 sec time intervals Variable Kinetics along the Sidewalls Via Fill Simulation Fill Time: 48 sec. Overpotential: - 124 mV Bottom: i = 60 mA/cm 2 i 0 = 1.12 mA/cm 2 C = 0.83 Top: i = 0.24 mA/cm 2 3.4 mA/cm 2 Depolarization by SPS: i 0 = 3.1 μA/cm 2 46 μA/cm 2 C = 0.9 Sidewalls: Interpolated kinetics between Top and Bottom

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SiO 2 Electrolyte Seam ‘Cell-Design’ Simulations Via Fill Simulation Plating Time: ~147 sec. Overpotential: - 80 mV Bottom: i = 10 mA/cm 2 i 0 = 1.12 mA/cm 2 C = 0.83 Top: i = 0.05 mA/cm 2 4.8 mA/cm 2 High Depolarization by SPS: i 0 = 3.1 μA/cm 2 0.28 mA/cm 2 C = 0.9 Sidewalls: Interpolated kinetics between Top and Bottom Current density has been lowered: No Bottom-Up Fill No Bottom-Up Fill 1 sec time intervals

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Deposit Propagation in Feature Clusters and Wide Features Flat regions - Passivated: i 0 =5x10 -4 A/cm 2 A c Bottom – Pure copper: i 0 =10 -3 A/cm 2 A c Side-walls - interpolated Cluster Wide Feature ‘Cell-Design’ Simulations

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Conclusions Simulation of bottom-up fill has been carried w/o invoking arbitrary assumptions Simulation of bottom-up fill has been carried w/o invoking arbitrary assumptions Simulation is based on, and implements ‘variable‘ kinetics = f(time, position) Simulation is based on, and implements ‘variable‘ kinetics = f(time, position) A commercial CAD program that accomodates moving boundaries and variable kinetics was used A commercial CAD program that accomodates moving boundaries and variable kinetics was used Different process parameters have been explored: Different process parameters have been explored: Transport and adsorption kinetics of inhibiting and depolarizing additives must match process Operating conditions (i, V) must be within range

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Acknowledgements Yezdi Dordi – Applied materials Yezdi Dordi – Applied materials Peter Hey – Applied Materials Peter Hey – Applied Materials Andrew Lipin – L-Chem Andrew Lipin – L-Chem

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Thank you for your attention

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