# Treinamento: Testes Paramétricos em Semicondutores Setembro 2012

## Presentation on theme: "Treinamento: Testes Paramétricos em Semicondutores Setembro 2012"— Presentation transcript:

Treinamento: Testes Paramétricos em Semicondutores Setembro 2012
Section 4 – Capacitance Measurement Basics Cyro Hemsi Engenheiro de Aplicação

Agenda Technology Area Where Capacitance Measurement is Used
Fundamental of Capacitance Measurement Basic Techniques to Achieve Accurate Capacitance Measurement

Technology Area Where Capacitance Measurement is Used

What is Capacitance ? Capacitance is amount of charge stored between the electrodes when applying a unit voltage. Basic Equations Electrode W: Width L: Length e0: Permittivity of vacuum A d: Distance e: Relative permittivity A: Area of electrode Relation of Charge and Applied Voltage V Dielectrics Q: Total charge Positive charge V: Applied voltage Negative charge Most important equation to remember!!

Physical Dimensions of Semiconductor Devices
Thickness of dielectrics can be determined from the gate capacitance. Source Drain Gate Semiconductor Substrate L W d Cgb Cgs Cgd Gate-Source Overwrap MOS FET Inter Connection Gate Dielectrics Inter layer dielectrics d Thickness of interlayer dielectrics can be determined from the capacitance between interconnecting wires. Cgb: Gate to body capacitance Cgd: Gate to drain capacitance Cgs: Gate to source capacitance Overwrap width between the gate electrode and drain or source area can be determined from the gate to drain or gate to source capacitances. Each capacitance represents actual physical dimensions and it is really important information to adjust conditions of manufacturing processes like lithography, etching, deposition time etc. Also, those parasitic capacitances are important to determine the gate delay of electric circuit in the logic devices.

Why Are MOSFET Capacitance Measurements Important?
SEQ. Why Are MOSFET Capacitance Measurements Important? Note that the value of the capacitance varies with applied DC voltage Gate oxide capacitance Gate oxide thickness Substrate impurity concentration Fermi potential Flat band capacitance Flat band voltage Surface charge density Fixed depletion layer charge Threshold voltage Capacitance versus voltage measurement + Physical device parameters (area, work function, etc.) Key Device Parameters Mathematical Calculations

Doping Profile of Semiconductor Devices
Distribution of boundary defect density by comparing CV curve measured by high frequency(>1 kHz) and low frequency (<10 Hz) CV measurement. Thickness of gate dielectrics can be extracted from Cmax. N-MOS Cap Space Charge (depletion) Layer p-Si Cg Cd Gate Dielectrics Ld V Low Frequency High Frequency Doping profile can be extracted from the Cmax and Cmin. Ld: Depth of depletion layer q: Charge of electron Na: Density of acceptor Vth V Threshold voltage can be extracted from the intersection point of Cmin and extrapolation of CV curve. CV characteristics of MOS-CAP (MOS-FET) is one of most important measurement item because it reveals various parameters related to the manufacturing process and device operation.

Capacitance Measurements for Solar Cell
Equivalent circuit model is determined by frequency sweep of impedance to optimize extra circuit to convert DC power generated by solar cell to AC Power. - N-type Rs Rp Frequency C Junction Leakage Space Charge Layer P-type Junction Capacitor + Residual Resistance Photo current Schematic of Solar Cell Impedance Spectroscopy Carrier density distribution over the depletion width is obtained from the slope of 1/Cp2 to Voltage plot (Mott-Schottky plot ) Defect density distribution is obtained from the Cp to AC voltage amplitude of capacitance measurement plot. AC Level (mVpp) Mott-Schottky Plot Drive-level Capacitance Profiling (DLCP)

Mobility Measurement of Organic Semiconductor Materials
T. Okachi et al. / Thin Solid Films 517 (2008) 1331–1334 Organic Material d Vdc Mobility of carrier is obtained from the maximum frequency of negative differential susceptance −ΔB=−w{C1(w)−Cgeo}. w: angular velocity of measurement signal. Cgeo: Geographical capacitance tt: Carrier transit time m: Mobility of carrier Improvement of mobility of organic material is most critical to put it to practical use.

Electrical Field by Applied Bias
Characterization of Electrostatic Capacitive MEMS (Micro Electro Mechanical System) Sensor Also, displacement of diaphragm is caused by the applied external bias voltage. Electrostatic capacitive MEMS sensor detects displacement of diaphragm by mechanical stimulations like acceleration, pressure or sonic wave as a modulation of electrostatic capacitance. Bias Voltage or Displacement Capacitance C0 Mechanical Stimulus Diaphragm Spring Fixed Electrode Electrical Field by Applied Bias Mechanical characteristics of MEMS sensor can be obtained from its capacitance to voltage characteristics. Electrical capacitance measurement is easier and faster than the measurement by a mechanical stimulus. Also frequency dependency of capacitance reveals mechanical response of the diaphragm spring.

Importance of On-Wafer Capacitance Measurement
On-wafer measurement becomes standard to develop various devices. Probe Wafer Chuck Wafer Semi-auto prober Advantage of On-wafer Measurement Quick evaluation and lower cost are possible because packaging is not necessary. Challenges There are many possible course of error from the cablings, wafer chuck, probing etc. To carry out accurate capacitance measurement, specific attention is necessary.

Fundamental of Capacitance Measurement

Basic Equations Related to Capacitance Measurement
Equation to Measure Capacitance Derivation Stimulus Capacitance is calculated from the measured charge and amplitude of applied step voltage. Step Voltage Capacitance is calculated from the measured current and ramp rate of applied ramp voltage. Ramp Voltage Capacitance is calculated from the measured impedance and frequency of applied AC signal. AC Voltage Most widely-used method by capacitance meter

Function of Each Terminal of Capacitance Meter
Agilent 4284A Keep “0V” in AC manner by active feedback. So called “Virtual Ground”, not actual ground. Auto Balancing Bridge I voltage of the test signal applied to DUT HCUR HPOT LPOT LCUR DUT current that flows through DUT V 0 V A V I LCUR LPOT HPOT HCUR Connect terminals based on its functionalities is important to measure capacitance correctly. Advantages of Auto Balancing Bridge Method High accuracy (0.05 % basic accuracy) Wide frequency range (20 Hz to 100 MHz) Various choices are available based on frequency range and functions. Agilent 4284A, 4285A, E4980A, E4981A, 4294A, B1500A

Equivalent Circuit Model and Equations to Extract Capacitance
Appropriate Parameter Parallel Model Complex Vector Equations Admittance Plane Im Cp Rp Cp-Rp Cp-G Cp-D Cp-Q Re Y G: Conductance D: Dissipation factor Q: Quality factor Appropriate Parameter Series Model Complex Vector Equations Impedance Plane Im Re Cs Cs-Rs Cs-D Cs-Q Rs Z Choosing appropriate measurement parameter is essential to extract capacitance correctly.

How Do Capacitance Meters Work?
Auto-Balancing Bridge Method Virtual ground V2 Rs I1 = I2 R2 Hc Lc DUT Hp I2 I1 Lp virtual ground of the Op Amp V1 Auto Balancing Bridge Method The auto balancing bridge can be conceptualized as an Op Amp circuit. Ohm's law applies: V=I*R . The device is stimulated by an AC signal, with the actual voltage applied to the device being monitored at the H (high) terminal. The L (low) terminal is driven to 0 volts by the virtual ground of the Op Amp. The current, I2, through the range resistor is equal to the current through the DUT. Therefore, the output voltage is proportional to the current through the device. Voltages and current are automatically balanced, thus giving rise to its name. To cover a wide frequency range, a null-detector and a modulator are used instead of an amplifier in practical circuits. Hc; Signal Source Hp: Potential Meter Lc: Current meter Lp: Potential Meter to Lock the phase of measurement signal. Impedance is calculated by Z = V1*R2/V2. Z = = V2 = I2 x R2 I2 V1 V2 V1R2 Impedance is calculated by Z = V1*R2/V2.

Four Terminal Pair (4TP) Measurement Method
Measurement Circuit 4TP: Minimize residual impedance V Lc Lp Hp A Hc Measurement Path Shields: Minimize stray capacitance Current flow: Minimize inductive coupling Connection with DUT Auto Balancing Bridge Method using 4TP Cabling The most commonly used cabling method is the four terminal pair, or “4TP” method. Any time you add cables to a measurement setup you inevitably create additional sources for measurement error. There are three main sources of error: Residual impedance in the cables Stray capacitance between cables or to ground Mutual inductance caused by the current flow between adjacent cables Any of these factors can act to reduce the impedance measurement range. To mitigate these factors we need to do the following: Eliminate the effects of the residual impedance by using a 4-cable or Kelvin style connection. Shield the cables to eliminate stray capacitance Eliminate the mutual inductance effect by allowing an induced current to flow through the outer conductor in opposition to the applied current flowing through the center conductor The 4TP method achieves these goals. DUT Virtual ground

B1500A Capacitance Measurement Coverage
EasyEXPERT 4.x QSCV HFCV Ultra-HFCV B1500A (SMU) B1500A (MFCMU) 4294A 1 kHz 5 MHz 110 MHz Using EasyEXPERT and the B1500A, you can create CV-IV solutions from 1 kHz to 5 MHZ using standard DC probes (4TP connection). You can also make quasi-static CV (QSCV) measurements using the SMUs. Agilent can supply positioner-based CV-IV switching solutions that do not degrade the measurement performance of the analyzer. Positioner-based switching solutions with measurement resolution of 0.5 mV and 10 fA, 1 fA, or 0.1 fA are available. Of course, Agilent also offers three different switching matrices for more advanced needs (B2200A, B2201A, and E5250A). Using the B2200A and B2201A switching matrices in conjunction with the B2220A interface and an approved low-leakage probe card, you can achieve current measurement resolutions of 1 fA (B2200A) and 10 fA (B2201A) all the way to the probe tips. In addition, Agilent will soon be able to supply EasyEXPERT application tests to control the 4294A as well. This makes using the 4294A much easier to use and reduces the learning curve. Note that for frequencies above 5 MHz, you cannot use switching matrices. Direct connections using RF probes with ground-signal (GS) or ground-signal-ground (GSG) configurations are required. Standard (>25 A) dielectrics Thin-gate (<25 A) dielectrics

Basic Techniques to Achieve Accurate Capacitance Measurement

Possible Sources of Measurement Error
Inappropriate selection of measurement parameter Capacitance is extracted based on the equation of the equivalent circuit model for selected measurement parameter. Mismatch of equation and equivalent circuit model causes measurement error. Selection of appropriate measurement parameter (equivalent circuit ) is important. Parasitic capacitance, residual resistance and inductance Cablings between the instruments and device affects measurement results. Minimizing influence of cablings are critical to achieve accurate measurement. Inappropriate execution of compensation Compensation is commonly used to remove the influence from the cablings. But inappropriate compensation has a devastating impact on measurement results. Compensation have to be done in correct manner!! Parasitic capacitance of wafer probing system. On-wafer measurement has a specific error caused by a parasitic of the wafer chuck not considered when measuring discrete components. Special care is required for on-wafer capacitance measurement.

Measurement Parameter
Error Caused by Using Inappropriate Selection of Equivalent Circuit Model Actual Device Measurement Parameter Measured Value Cp Rp Cp-Rp Error caused by measurement parameter mismatch Cs-Rs Cs Cp-Rp Quick Tips: If measured capacitance value is stable when measurement frequency is changed, the selection of measurement parameter is appropriate, because error component has frequency dependency. Rs Cs-Rs Inappropriate selection of measurement parameter increases measurement error.

Measurement Parameter Selection for Actual Device
Parameter to select Conditions MOS-FET Source Gate Drain Cp Rp Cp-Rp Cp-G Cp-D Cp-Q Gate Resistance AND Gate Contact resistance of via Sub Cs Rs Gate Leakage Junction Resistance Cs-Rs Cs-D Cs-Q AND Cp Rp Relatively thick dielectrics of technology node over 90 nm will satisfy either of above. Rs For more shrunk process, parameter extraction using multi-frequency is necessary. Actual Equivalent Circuit

Error Caused by Cablings
Residual Inductance LCR Meter Residual Resistance Device to Measure Output terminals of LCR Meter Calibration Plane Parasitic Capacitance Rres is Included in the Rs when using Cs-Rs mode. But in Cs-Rp mode, Rres is included in the error of measured capacitance. Influence of residual inductance Increases along with a square of frequency Total impedance measured by LCR Meter Lres Rres Cpar Cdev Higher frequency results in larger measurement error Additional Error Not related to the measurement frequency

Minimizing Error from Cablings
Eliminate parasitic capacitance of cable extension by using coaxial cable and connect shield to the shield of the test leads. Connect shield of cable extensions at end of cable each other to minimize residual inductance. Connect shield of test leads each other to terminate four terminal pair. LCR Meter LCR Meter Test Leads Cable Extension Probe HCUR HPOT V LPOT LCUR LPOT HPOT HCUR Output Terminals LCUR A Make unshielded part as short as possible to minimize residual inductance and Extends output to the device to measure near as possible by using the test leads of LCR meter Test Leads for LCR Meter Measurement Current Current return to HCUR

END Of section 4