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Chapter 3 Basic Logic Gates 1.

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Presentation on theme: "Chapter 3 Basic Logic Gates 1."— Presentation transcript:

1 Chapter 3 Basic Logic Gates 1

2 Objectives You should be able to:
Describe the operation and use of AND gates and OR gates. Construct truth tables for AND and OR gates. Draw timing diagrams for AND and OR gates. Use timing analysis to describe operation of an ENABLE function. 2

3 Objectives You should be able to:
Sketch external connections to IC chips to implement AND and OR logic circuits. Explain how to use a logic pulser and a logic probe to troubleshoot digital ICs. Describe the operation and use of NAND and NOR gates. Construct truth tables for NAND and NOR gates. 3

4 Objectives You should be able to:
Draw timing diagrams for NAND and NOR gates. Use the outputs of a Johnson shift counter to generate specialized waveforms using combinations of the five basic gates. Develop a comparison of Boolean equations and truth tables for the five basic gates. 4

5 The AND Gate The output, X, is HIGH if input A AND input B are both HIGH Figure 3-1 5

6 The AND Gate Truth Table – 6

7 The AND Gate Boolean Equation X = A AND B or X = AB
Can have more than two inputs Number of combinations = 2N 7

8 The OR Gate The output at X will be HIGH whenever input A OR input B is HIGH or both are HIGH Figure 3-5 8

9 The OR Gate Truth Table - 9

10 The OR Gate Boolean Equation X = A OR B or X = A+B
Can have more than two inputs Number of combinations = 2N 10

11 Timing Analysis Timing diagram Oscilloscope Logic analyzer
Voltage versus time Up to two Logic analyzer State table Up to 16 11

12 Timing Analysis MultiSIM AND gate simulation. 12

13 Timing Analysis Example of timing analysis – Determine the output. 13

14 Enable and Disable Functions
Enable function using AND gate Figure 3-17 14

15 Enable and Disable Functions
Disable function using OR gate Figure 3-18 15

16 Using Integrated Circuit Logic Gates
Enable and Disable Pin Connections VCC and GND Figure 3-20 16

17 Introduction to Troubleshooting Techniques
The procedure used to find the fault or trouble in a circuit. Logic Probe Metal tip Indicator lamp(s) Floating - open circuit, neither HIGH nor LOW Logic Pulser - provide known digital signal to a circuit 17

18 Discussion Points Describe how a logic probe and pulser could be used to troubleshoot an AND gate. Describe how a logic probe and pulser could be used to troubleshoot an OR gate. 18

19 The Inverter Used to complement or invert a digital signal Figure 3-27
19

20 The Inverter Truth Table Boolean Equation X = A Inversion bar NOT gate
20

21 The NAND Gate Same as the AND gate except that its output is inverted
Figure 3-29 21

22 The NAND Gate Truth Table Boolean Equation X = AB
Multiple inputs - the output is always HIGH unless all inputs go HIGH 22

23 The NOR Gate Same as the OR gate except that its output is inverted
Figure 3-36 23

24 The NOR Gate Truth Table Boolean Equation X = A + B
See Table 3-8 in your text 24

25 Logic Gate Waveform Generation
Repetitive waveform Waveform generator Johnson shift counter Figure 3-43 25

26 Discussion Point Which Johnson counter outputs must be connected to a 3 input AND gate to enable only CP #4? 26

27 Discussion Point Sketch the output waveform resulting from inputting the Johnson counter outputs shown: 27

28 Using IC Logic Gates Hex - six gates Figure 3-60 28

29 Using IC Logic Gates Quad - four gates
three-, four-, and eight-input configurations Figure 3-61 29

30 Summary of Basic Logic Gates and IEEE/IEC Standard Logic Symbols
30

31 Summary of Basic Logic Gates and IEEE/IEC Standard Logic Symbols
Figure 3-65 31

32 Discussion Point Briefly describe the operation of each of the basic logic gates: AND OR NOT (inverter) NAND NOR 32

33 Discussion Point Create a truth table for a three input NAND gate.
Write the Boolean equation for a 3 input OR gate. 33

34 Discussion Point Sketch the output waveform X for the 2 input AND gate shown. 34

35 Discussion Point Sketch the output waveforms for the Johnson shift counter outputs shown: 35

36 Discussion Point Determine the problem (if any) with the 7427 NOR IC using the logic probe results shown: 36

37 Summary The AND gate requires that all inputs are HIGH in order to get a HIGH output The OR gate outputs a HIGH if any of its inputs are HIGH An effective way to measure the precise timing relationships of digital waveforms is with an oscilloscope or a logic analyzer 37

38 Summary Beside providing the basic logic functions, AND and OR gates can also be used to enable or disable a signal to pass from one point to another There are several integrated circuits available in both TTL and CMOS that provide the basic logic functions 38

39 Summary Two important troubleshooting tools are the logic pulser and the logic probe. The pulser is used to inject pulses into a circuit under test. The probe reads the level at a point in a circuit to determine is it is HIGH, LOW, or floating An inverter provides an output that is the complement of its input 39

40 Summary A NAND gate outputs a LOW when all of its inputs are HIGH
A NOR gate outputs a HIGH when all of its inputs are LOW Specialized waveforms can be created by using a repetitive waveform generator and the basic gates 40

41 Summary Manufacturers’ data manuals are used by the technician to find the pin configuration and operating characteristics for the ICs used in modern circuitry. 41


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