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Chapter 21 Swapping: Mechanisms Chien-Chung Shen CIS/UD

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Presentation on theme: "Chapter 21 Swapping: Mechanisms Chien-Chung Shen CIS/UD"— Presentation transcript:

1 Chapter 21 Swapping: Mechanisms Chien-Chung Shen CIS/UD cshen@udel.edu

2 Go Beyond Physical Memory How to support many concurrently-running large address spaces ? –OS needs a place to stash away portions of address spaces that currently aren’t in great demand (where ?) swap space on hard disk drive –how can OS make use of a larger, slower device (disk) to transparently provide the illusion of a large virtual address space virtual memory (with swap space on disk) –why support a single large address space for process ? convenience and ease of use

3 Swap Space Reserved space on disk for moving pages back and forth –remember disk address of a given page –How many processes? Which one is not running? –“Code” page(s) of a.out are initially on disk

4 TLB Algorithm (Review) Running process generates virtual memory references Valid implies present as all pages in memory

5 Present Bit and Page Fault When hardware looks in PTE, it may find page is not present in physical memory –present bit == 0 (page is not in memory) –page fault The act of accessing a page that is not in physical memory Upon page fault, OS page-fault handler (for both hardware-managed and software-managed TLBs) runs Why not hardware handle page fault ? –disk is too slow and too much details to handle Where to find the desired page ? –page table (indicating either PFN or disk address)

6 When Memory Is Full OS pages out one or more pages to make room for new page(s) OS is about to page in –page-replacement policy –disk-like speed vs. memory-like speed (10,000 or 100,000 times slower)

7 Page Fault Control Flow hardware Software control flow // valid and present // run page-fault handler

8 Page Fault Control Flow VPN = (VirtualAddress & VPN_MASK) >> SHIFT (Success, TlbEntry) = TLB_Lookup(VPN) if (Success == True) // TLB Hit if (CanAccess(TlbEntry.ProtectBits) == True) Offset = VirtualAddress & OFFSET_MASK PhysAddr = (TlbEntry.PFN << SHIFT) | Offset Register = AccessMemory(PhysAddr) else RaiseException(PROTECTION_FAULT) Else // TLB Miss PTEAddr = PTBR + (VPN * sizeof(PTE)) PTE = AccessMemory(PTEAddr) if (PTE.Valid == False) RaiseException(SEGMENTATION_FAULT) else if (CanAccess(PTE.ProtectBits) == False) RaiseException(PROTECTION_FAULT) else if (PTE.Present == True) // assuming hardware-managed TLB TLB_Insert(VPN, PTE.PFN, PTE.ProtectBits) RetryInstruction() else RaiseException(PAGE_FAULT)

9 When Replacement Occurs OS proactively keeps a small amount of memory free by having high watermark (HW) and low watermark (LW) to help decide when to start evicting pages from memory When OS notices that there are fewer than LW pages available, a background thread (swap daemon or page daemon) that is responsible for freeing memory runs to evict pages until there are HW pages available Cluster or group a number of pages and write them out at once to the swap space, thus increasing the efficiency of the disk (by reducing seek and rotational overheads of disk)


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