1. Universal College Of Engineering & Technology UCET 1/27

2. MICROCONTROLLER AND INTERFACING Guided By : Prof. Parth Patel Soni Kapil 110460111019 EC 5 TH SEMESTER UCET 2/27

3. UCET 3/27 ADD INSTRUCTION Mnemonic: ADD Rd, Rr Operation: This instruction adds the contents of source register Rr with the contents of destination register. Example: ADD R3, R4 This instruction adds the contents of registers of R3 and R4 and result is placed in R3 register.

4. UCET 4/27 ADC INSTRUCTION Mnemonic: ADC Rd, Rr Operation: This instruction adds the contents of source register Rr with the contents of destination register and carry. Example: ADC R4, R1 This instruction adds the contents of registers of R4 and R1 with carry and result is placed in the R4 register.

5. UCET 5/27 ADIW INSTRUCTION Mnemonic: ADIW Rd+1:Rd,K Operation: This instruction adds immediate data to a register pair and stores the result in the register pair. Example: ADIW R25:R24,3 This instruction adds 3 to the contents of register pair R25:R24. The result is placed in the register pair R25:R24.

6. SUB INSTRUCTION Mnemonic: SUB Rd, Rr Operation: This instruction subtracts the contents of source register Rr from the contents of destination register and result is placed in the destination register. Example: SUB R3, R4 This instruction subtracts the contents of register of R3 from register R4 and result is placed in the R3 register. UCET 6/27

7. UCET 7/27 SUBI INSTRUCTION Mnemonic: SUBI Rd, K Operation: This instruction subtracts the contents of constant K from the contents of register Rd and places the result in register Rd. Example: SUBI R20, 0x10 This instruction subtracts 0x10 from the contents of register R20 and result is placed in register R20.

8. UCET 8/27 SBC INSTRUCTION Mnemonic: SBC Rd, Rr Operation: This instruction subtracts the contents of source register Rr and carry from the contents of destination register and result is placed in the destination register. Example: SBC R3, R4 This instruction subtracts the contents of R4 and carry C from the contents of register R3 and result is placed in the destination register.

9. UCET 9/27 SBCI INSTRUCTION Mnemonic: SBCI Rd,K Operation: This instruction subtracts the contents of constant K and carry C from the contents of register Rd and places the result in the register Rd. Example: SUBI R24, 0x20 SBCI R25, 0x44 subtract 4420 from R25:24 register pair R24=R24-20 R25=R25-44-C subtract high byte with carry

10. SBIW INSTRUCTION Mnemonic: SBIW Rd+1:Rd,K Operation: This instruction subtracts the contents of constant K from the contents of register pair Rd+1: and places the result in the register pair Rd+1:Rd. Example: SBIW R25:R24, 3 This instruction subtracts 3 from the contents of register pair R25:R24. The result is placed in the register pair R25:R24. UCET 10/27

11. UCET 11/27 AND INSTRUCTION Mnemonic: AND Rd,Rr Operation: This instruction logically ANDs the contents of source register Rr with the contents of destination register and result is placed in the destination register. Example: AND R3, R4 This instruction logically ANDs the contents of register R3 and R4 and result is placed in the register R3.

12. AND INSTRUCTION Mnemonic: ANDI Rd, K Operation: This instruction logically ANDs the contents of register Rd with constant K and places the result in register Rd. Example: ANDI R18, 0xFo This instruction logically ANDs the contents R18 with F0 H and result is placed in register Rd. UCET 12/27

13. UCET 13/27 OR INSTRUCTION Mnemonic: OR Rd,Rr Operation: This instruction logically ORs the contents of source register Rr with the contents of destination register and result is placed in the destination register Example: OR R3, R4 This instruction logically Ors the contents of source register R3 and R4 and result is placed in the R3 register.

14. UCET 14/27 ORI INSTRUCTION Mnemonic: ORI Rd, K Operation: This instruction logically ORs the contents of register Rd with constant K and places the result in the Register Rd. Example: ORI R18, 0xF0 This instruction logically Ors the contents of register R18 with F0H and result is placed in in register R18.

15. UCET 15/27 EOR INSTRUCTION Mnemonic: EOR Rd, Rr Operation: This instruction logically Ex-Ors the contents of source register Rr with the contents of destination register Rd and result is placed in the destination register Rd. Example: EOR R3, R4 This instruction logically Ex-Ors the contents of register R3 and R4 and result is placed in register R3.

16. COM INSTRUCTION Mnemonic: COM Rd Operation: This instruction finds the 1’s complement of the value in register Rd and the result is stored in in Rd. Example: COM R2 Find 1’s complement of the number in R2 UCET16/27

17. NEG INSTRUCTION Mnemonic: NEG Rd Operation: This instruction finds the 2’s complement of the value in register Rd and the result is stored in Rd. Example: NEG R10 Find 2’s complement of the number in R10. UCET17/27

18. SBR INSTRUCTION Mnemonic: SBR Rd, K Operation: This instruction sets the bits specified in register Rd, performs logical OR Operation with the contents of register Rd and stores the result in register Rd. Example: SBR R18, 2 The instruction sets bit 2 in register R18. UCET 18/27

19. CBR INSTRUCTION Mnemonic: CBR Rd, K Operation: This instruction clears the bits specified in register Rd, performs the logical AND operation with the contents of register and stores the result in Rd Example: CBR R18, 2 This instruction clears bit 2 in register R18. UCET19/27

20. INC INSTRUCTION Mnemonic: INC Rd Operation: This instruction increment the contents of register Rd by 1 and result is stored in register Rd. Example: INC R20 This instruction increment the contents of the register Rd by 1 and result is stored in register Rd UCET20/27

21. DEC INSTRUCTION Mnemonic: DEC Rd Operation: This instruction decrement the contents of register Rd by 1 and result is stored in register Rd. Example: DEC R16 This instruction decrement the contents of R16 by 1. UCET21/27

22. TST INSTRUCTION Mnemonic: TST Rd Operation: This instruction is used to test a register for zero or negative, a logical AND operation is done. Example: TST R2 Test register R2 UCET22/27

23. CLR INSTRUCTION Mnemonic: CLR Rd Operation: This instruction clears a register Rd by performing logical Ex-OR operation with itself. Example: CLR R16 This instruction will clear the register. UCET23/27

24. SER INSTRUCTION Mnemonic: SER Rd Operation: This instruction loads register Rd with FF H Example: SER R19 This instruction sets all the bits of register R19=FF H UCET24/27

25. MUL INSTRUCTION Mnemonic: MUL Rd, Rr Operation: This instruction multiplies an eight bit unsigned integer in the register Rr with the unsigned number Rd. Example: MUL R5, R2 This instruction multiplies the unsigned number in register R5 and R2 and result is placed in R1 and R0 register. UCET25/27

26. MULS INSTRUCTION Mnemonic: MULS Rd, Rr Operation: This instruction multiplies an eight bit signed integer in the register Rr with the signed number in register Rd. Example: MULS R25, R2 This instruction multiplies the signed number in register R25 and R2 and result is placed in R1 and R0 register. UCET26/27

27. MULSU INSTRUCTION Mnemonic: MUL Rd, Rr Operation: This instruction multiplies an eight bit unsigned integer in the register Rr with the signed number in register Rd. The low order byte of the sixteen bit product is left in the register R0 and the high order byte in register R1. UCET 27/27