1. CS151 Introduction to Digital Design Chapter 4: Arithmetic Functions and HDLs 4-1: Iterative Combinational Circuits 4-2: Binary Adders 1Created by: Ms.Amany AlSaleh

2. 2 Overview  Iterative combinational circuits  Binary adders Half and full adders Ripple carry adder  Binary subtraction  Binary adder-subtractors Signed binary numbers Signed binary addition and subtraction Overflow  Binary multiplication  Other arithmetic functions Design by contraction Created by: Ms.Amany AlSaleh

3. 3 4-1 Iterative Combinational Circuits  In this chapter we will focus on a special class of functional blocks that perform arithmetic operations.  Arithmetic function blocks operate on binary input vectors and produce binary output vectors. Use the same subfunction in each bit position.  Can design functional block for subfunction and repeat to obtain functional block for overall function.  Cell  subfunction block.  Iterative array  a array of interconnected cells (cells are often identical).  An iterative array can be in a single dimension (1D) or multiple dimensions. Created by: Ms.Amany AlSaleh

4. 4 Arithmetic Circuits  Arithmetic Circuits:  Arithmetic Circuits: Combinational circuits that perform arithmetic operations such as Addition Multiplication Subtraction Division Using binary numbers or decimal numbers in binary code. Created by: Ms.Amany AlSaleh

5. 5 Block Diagram of a 1D Iterative Array  Example: a circuit that adds two 32-bit binary numbers (n = 32) Number of inputs = Number of outputs = Truth table rows = Equations with up to input variables Equations with huge number of terms Design impractical!  Develop using hierarchical design; design a circuit that processes 2 bits (e.g. 2-bit addition), and use it as a building block for a circuit that processes n bits.  Iterative array takes advantage of the regularity to make design feasible. 64 32 2 64 64 Created by: Ms.Amany AlSaleh

6. 6 4-2 Binary Adders  Binary addition used frequently  Addition Development: Half-Adder (HA), a 2-input bit-wise addition functional block, Full-Adder (FA), a 3-input bit-wise addition functional block, Ripple Carry Adder, parallel binary adder to perform n-bit binary addition. Created by: Ms.Amany AlSaleh

7. 7 Functional Block: Half-Adder  A 2-input, 1-bit width binary adder that performs the following computations:  I. Specifications: 2 Inputs: Augend X and Addend Y. 2 Outputs: Sum bit S and Carry bit C.  II. Truth Table:  X 0 0 1 1 + Y + 0 + 1 + 0 + 1 C S 0 0 1 1 0 X Y C S 0 0 0 0 0 1 0 1 1 0 0 1 1 1 1 0  III. Equations: S = X Y’ + X’ Y = X  Y C = X Y Created by: Ms.Amany AlSaleh

8. 8 Implementation: Half-Adder  IV. Logic Diagram: YXC YXS   X Y C S Created by: Ms.Amany AlSaleh

9. 9 Functional Block: Full-Adder  A full adder is similar to a half adder, but includes a carry-in bit from lower stages. Like the half-adder, it computes a sum bit, S and a carry bit, C. For a carry-in (Z) of 0, it is the same as the half-adder: For a carry- in (Z) of 1: Z0000 X0011 + Y+ 0+ 1+ 0+ 1 C S000 1 1 0 Z1111 X0011 + Y+ 0+ 1+ 0+ 1 C S0 11 0 11 Created by: Ms.Amany AlSaleh

10. 10 Logic Optimization: Full-Adder  I. Specifications: 3 Inputs: X, Y and Z (carry in) 2 Outputs: Sum S and Carry C  II. Full-Adder Truth Table: XYZCS 00000 00101 01001 01110 10001 10110 11010 11111 X Y Z 0132 4576 1 1 1 1 S X Y Z 0132 4576 111 1 C  III. Optimization: Full-Adder K-Map: S = ∑(1,2,4,7) C = ∑(3,5,6,7) S is 1 when one input is 1 or all inputs are 1 Created by: Ms.Amany AlSaleh

11. 11 Equations: Full-Adder  From the K-Map, we get:  The S function is the three-bit XOR function (Odd Function):  The Carry bit C is 1 if both X and Y are 1 (the sum is 2), or if the sum is 1 and a carry-in (Z) occurs. Thus C can be re-written as: ZYZXYXC ZYXZYXZYXZYXS   ZYXS  Z)YX(YXC  7 AND gates and 2 OR gates Created by: Ms.Amany AlSaleh

12. 12 Implementation: Full Adder ZYXS  Z)YX(YXC  Two Half-Adders can be employed to implement a full adder. Created by: Ms.Amany AlSaleh

13. 13 4-bit Ripple-Carry Binary Adder  A parallel binary adder is a digital circuit that produces the arithmetic sum of two binary numbers using combinational logic.  The parallel adder uses n full adders in parallel, with all input bits applied simultaneously to produce the sum.  A four-bit Ripple Carry Adder made from four 1-bit Full Adders (FA) connected in cascade.  Ripple Carry…A carry 1 may propagate through many FAs to the most significant bit just as a wave ripples outward… Input carry Output carry Created by: Ms.Amany AlSaleh

14. 14 Binary Adders  To add multiple-bit operands, we “bundle” logical signals together into vectors and use functional blocks that operate on the vectors  Example: 4-bit ripple carry adder: Adds input vectors A(3:0) and B(3:0) to get a sum vector S(3:0)  Note: carry out of cell i becomes carry in of cell i + 1  Note: if the usual design method has been used, how many rows in the truth table will be there? Created by: Ms.Amany AlSaleh