1. Juan Valls - LECC03 Amsterdam 1 Recent System Test Results from the CMS TOB Detector  Introduction  ROD System Test Setup  ROD Electrical and Optical Characterization  Noise Characterization (ROD vs OTRI)  S/N, Signal Efficiencies, Noise Occupancies  Conclusions Juan Valls CERN 9 th Workshop on Electronics For LHC Experiments

2. Juan Valls - LECC03 Amsterdam 2 Introduction  CMS SST Total of ~25000 Si modules in Barrel (10 layers) and Endcap (18 disks) 80000 FE chips, 50000 optical links TOB: 6 layers (~5000 silicon modules) 10-14 points per track 223 m 2 of silicon (CDF ~2 m 2, ATLAS ~60 m 2 ) 10M of readout strips ~25 m 3 T=-10 o C RODs: basic TOB readout units (~700 RODs)

3. Juan Valls - LECC03 Amsterdam 3 RODs Assembly 81012 1 7 3 9 5 11 246 CCUM  6 (SS) or 12 (DS) silicon modules  Interconnection electronics (ICB, ICC)  Control electronics (CCUM)  Optoelectronics (AOH)  Cooling pipe + module cooling elements CF frame profile ICBICCs

4. Juan Valls - LECC03 Amsterdam 4 ROD Assembly (Readout) Analog Optohybrids (AOH ICs) 24 fibers

5. Juan Valls - LECC03 Amsterdam 5 ROD System Test Setup FEC2CCUM board Optical Readout Electrical Controls TOB DS ROD Layer 1 HV LV C 6 F 14 Cooling Plant 1 kW +5  C/+32C (~3 m)

6. Juan Valls - LECC03 Amsterdam 6 Thermal Behavior t (sec) T (°C) LV offLV onLV off  T (Si-pipe)  6 °C Design figure:  T < 10 °C with irradiated sensors and highest optohybrid settings  All tests at room temp  To be repeated in the cold DS ROD SS ROD

7. Juan Valls - LECC03 Amsterdam 7 System Tests  Integrate sensors with FE electronics, interconnecting boards and buses in the final mechanical support  Integrate full optical link for signal distribution (control and readout)  Integrate HV and LV power, long cables and test LV power uniformity  Verify electrical tests to check integrity of signals (timing and control) through transmission between cards  Tunning of the controls and analogue optical links  Validate grounding and detector bias schemes by studying noise  Analysis of data from sensors, S/N ratios, signal efficiencies and strip noise occupancies Main objectives of pre-production phase (system tests) are the validation of the overall design structure before production

8. Juan Valls - LECC03 Amsterdam 8 Control and Readout Front End Drivers Front End Controllers

9. Juan Valls - LECC03 Amsterdam 9 Time Alignment Scans  Scan through PLL fine delays (1.04 ns) and with a fixed FED digitization delay  Reconstruct APV tick marks  The DS ROD introduces shift delays of ~2 ns on the trigger arrival time to APVs. FED 0 FED 1 FED 2

10. Juan Valls - LECC03 Amsterdam 10 FED Digitizing Point  Find the FED optimal digitization point  Reconstruct APV tick marks by varying FED skew clock delay wrt data (PLL settings fixed)  Choose sampling point close to the back edge of the tick mark FED 0 FED 1 FED 2

11. Juan Valls - LECC03 Amsterdam 11 Optical Scan Characterization  Plot ticks and baselines as a function of bias (for a fixed gain)  Get the tick amplitude from the difference between these distributions baselines ticks AOH bias AOH Gain = 1 (24 fibers) AOH bias tick amplitudes

12. Juan Valls - LECC03 Amsterdam 12 Optical Scan Characterization Gain 0 Gain 1 Gain 2 Gain 0 Gain 2 Gain 1 Bias 150-210 counts  Find optimal settings (gain and bias) for an 800 mV AOH input tick amplitude  What does this correspond to at the FED (in ADC counts)?  Need to calibrate FED cards: FED gain ~3.5 mV/count, Optolink gain ~0.8V/V

13. Juan Valls - LECC03 Amsterdam 13 DS ROD Noise Deconvolution Non-Inverting (200 V) CCUM  diff  tot  CMN

14. Juan Valls - LECC03 Amsterdam 14 DS ROD CMN CMN (flat) Calculation (running average pedestals) Non-Inverting Inverting ~40% 

15. Juan Valls - LECC03 Amsterdam 15 DS ROD HV Scans HV Bias Scan on DS ROD 6 HV channels for 12 modules (CAEN SY-127, A343 boards) Total noise (ADC) = f (Vbias) Full depletion at ~150 Volts Similar behavior for all modules 30% larger Noise in the DS ROD wrt OTRI setup

16. Juan Valls - LECC03 Amsterdam 16 Full Gain Scans Fit Range: Ical=18 to Ical=70 0.6 – 2.7 MIPs Ical=29 ~ 25000 elec Peak Mode Non-Inverting Deconvolution Non-Inverting  OTRI  ROD  OTRI  ROD ~ 850 e/ADC (OTRI) ~ 650 e/ADC (ROD)

17. Juan Valls - LECC03 Amsterdam 17 Noise (DS ROD vs OTRI) APV25 bare chip on PCB (C inp =18 pF) Peak: 900 elec. Dec: 1500 elec. OTRI Setup Peak: 1600 elec. Dec: 2600 elec. DS ROD Setup Peak: 1600 elec. Dec: 2700 elec. Peak Mode Non-Inverting Deconvolution Non-Inverting

18. Juan Valls - LECC03 Amsterdam 18 Signal to Noise Ratios ~500 Hz ~0.5 Hz  Use Ru 106 beta source and cosmic rays  Simple cluster algorithm based on S/N thresholds S/N>5 S/N>2 S/N S/N=14.1 S/N=14.9 S/N=14.7 S/N=15.3 S/N=23.2S/N=25.9

19. Juan Valls - LECC03 Amsterdam 19 Efficiencies, Strip Occupancies  The FEDs will run a cluster finding algorithm (zero-suppression) during data taking  Only strips associated with clusters will be readout (LVL1 100 kHz  Occupancies < 1.8%) Signal EfficienciesStrip Occupancies

20. Juan Valls - LECC03 Amsterdam 20 Signal Efficiencies vs Noise Occupancies 2 (2.3%)  = 100% 3 (0.14%)  = 98% 4 (0.003%)  = 94.5% 2 (2.3%)  = 100% 3 (0.14%)  = 99.7% 4 (0.003%)  = 96.4%

21. Juan Valls - LECC03 Amsterdam 21 Conclusions  Mechanical and electrical performance of pre-production RODs validated in system tests and test-beams at CERN Thermal behavior and cooling performance verified at room temperature Electrical tests verified Grounding and detector bias schemes validated S/N studied  On the way to production… First production ROD assembled and characterized at CERN last week Production started ~760 RODs to be assembled at CERN and USA

22. Juan Valls - LECC03 Amsterdam 22 XROD Software Noise Pulse Shape Scan Frames Gain Scan  ROD FAST debugging tool  CMS-like DAQ hardware  Access to BE boards TSC, FEC, FED, CCUM Handles CCU6 and CCU25  Access to FE registers PLL, MUX, APV, DCU, AOH Handles DCU1 and DCU2 Handles LLD1 and LLD2  Internal/external TSC triggers (and FED internal)  Single GUI Interface

23. Juan Valls - LECC03 Amsterdam 23 Module Biasing Scheme NAIS HV Connector on Kapton Cable Vbias     GND (wirebond to bias ring) Bias Connector on Kapton Cable TIB TOB / TEC