1. Oct, 2000CMS Tracker Electronics1 APV25s1 STATUS Testing started beginning September 1 wafer cut, others left for probing 10 chips mounted on test boards 9 work well all I2C registers read/writeable no obvious pipeline defects (run with pseudo-random trigger after single reset) pulse shape OK for one channel 1 chip with obvious analogue problem 1 channel pedestal stuck high and low gain in others Detailed results here confined to few chips so far Outline Performance of S1 chip version (early results) Pulse shape, linearity, noise, pipeline uniformity, radiation tests Conclusions Mark Raymond m.raymond@ic.ac.uk

2. Oct, 2000CMS Tracker Electronics2 Wafer layout ~ 390 viable APV25s1 sites / wafer

3. Oct, 2000CMS Tracker Electronics3 Wafer detail showing reticule reticule consists of 4 APVs 1 APVMUX/PLL test structures

4. Oct, 2000CMS Tracker Electronics4 APV25s1 layout 7.1 mm 8.1 mm design changes input edge layout changes to reduce track resistance (input pad layout changed) calibration capacitor layout improved gain increased (resistor values at mux input stage) added internal master current reference for bias generator (backend pad layout changed from s0 version) digital bug in pipeline logic fixed minor tweaks to component values to achieve greater margins for operation (shaper feedback resistance)

5. Oct, 2000CMS Tracker Electronics5 Analogue part of data frame software reordered Output data frame Raw data frame Actual channel order Samples at 50 nsec. intervals Digital header 1 mip Current [mA] differential current output (+ve o/p only shown above) nominal (mid-range) gain now 1.2 mA/mip variable between 0.8 and 1.5 in 5 steps

6. Oct, 2000CMS Tracker Electronics6 APV25s1 biasing internal/external option determined by 2 pads (IREF & IREFBIAS) modeIREFIREFBIAS I VDD[mA] I VSS[mA] external128  A (R to VDD) VDD 94 156 internaldisconnect GND 89 143 (VDD=2.5, GND=1.25, VSS=0) recommended bias settings (decimal) (preliminary) if external bias at 128  A IPRE85 IPCASC45 IPSF30 ISHA~ 30 tune for optimum pulse rise time ISSF30 IPSP48 IMUXIN30 VFP~ 30 VFS~ 60 tune for optimum pulse fall time NOTE: These current values are ~70% less than those for s0 (current mirroring ratio changed)

7. Oct, 2000CMS Tracker Electronics7 time [nsec.] ADC units Pulse shape dependence on input capacitance Peak mode pulse shape tuned (shaper amplifier bias settings) for each value of input capacitance ISHA: 21 -> 65 (I2C register setting ~ roughly =  A) VFS: 63 -> 50

8. Oct, 2000CMS Tracker Electronics8 Pulse shape dependence on shaper feedback resistor control voltage VFS Feedback FET length slightly reduced from S0 version to ensure short enough time constant achievable with margin optimum value here ~ 60 (decimal)

9. Oct, 2000CMS Tracker Electronics9 ADC units time [nsec.] output signal [mips] input signal injected [mips] Linearity Input signal charge injected in 0.5 mip steps from 0.5 to 7 mips. output normalised to input at 1 mip point linearity good up to 3 mips, gradual fall off beyond

10. Oct, 2000CMS Tracker Electronics10 Calibration response of all 128 channels superimposed ADC units 3.125 nsec steps Gain/calibration uniformity ADC units channel no.(mux order) Pulse peak height dependence on channel number peak ht. [ADC units] Good channel matching frequency Calibration capacitor layout improved

11. Oct, 2000CMS Tracker Electronics11 ENC [rms electrons] Input capacitance [pF] Noise No dependence on channel number < 2000 electrons achievable for detectors < 25 pF Dependence on input capacitance

12. Oct, 2000CMS Tracker Electronics12 Pipeline - pedestals Pedestal dependence on pipeline location channel 19, peak mode pipeline location ADC units Measure for every channel, take rms value, convert to electrons and histogram frequency rms electrons No significant noise contribution

13. Oct, 2000CMS Tracker Electronics13 Pipeline – gain uniformity How well do pipeline capacitors match? Signal retrieved as charge so mismatch => gain dependence on pipeline capacitance Measure by storing/retrieving signal to/from every cell ADC units frequency Very good matching between pipeline cells

14. Oct, 2000CMS Tracker Electronics14 ADC units time [nsec.] beforeafter 10 Mrads Radiation tests 1chip irradiated to 10 Mrads using 50 kV X-rays Noise – histogram all channels after 10 Mrads before Almost no observable degradation after 10 Mrads (confirms results from s0 run) rms ADC units minor retuning of pulse shape required after irradiation

15. Oct, 2000CMS Tracker Electronics15 Probe testing plans for APV25s1 New probe card made (only needs active and decoupling components to be added) similar (functionally) to s0 version except multiple (3) probes for power on front edge 1 amplifier input probed allowing true chip gain to be determined Additions to test software measure pulse height for probed channel test multi-mode operation sweep one bias setting measuring power supply currents Tested die should be available early November

16. Oct, 2000CMS Tracker Electronics16 APVMUX/PLL status

17. Oct, 2000CMS Tracker Electronics17 Conclusions Early APV25s1 results indicate good performance consistent with results from APV25s0. Minor problems fixed.