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© 2003-2008 BYU 09 MUX Page 1 ECEn 224 Multiplexers Decoders ROMs (LUTs)

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Presentation on theme: "© 2003-2008 BYU 09 MUX Page 1 ECEn 224 Multiplexers Decoders ROMs (LUTs)"— Presentation transcript:

1 © 2003-2008 BYU 09 MUX Page 1 ECEn 224 Multiplexers Decoders ROMs (LUTs)

2 © 2003-2008 BYU 09 MUX Page 2 ECEn 224 A Problem Statement Design a circuit which will select between two inputs (A and B) and pass the selected one to the output (Q). The desired circuit is called a multiplexer or MUX for short

3 © 2003-2008 BYU 09 MUX Page 3 ECEn 224 0101 0101 A B S Q A B S Q Preferred symbol Multiplexer Symbols “Select” input

4 © 2003-2008 BYU 09 MUX Page 4 ECEn 224 0 1 A B 1 Q 0 1 A B 0 Q Data Steering 0 1 A B S Q Key idea: The select input wire selects one of the inputs and passes it out to the output. This is called a 2:1 MUX (pronounced “two-to-one”)

5 © 2003-2008 BYU 09 MUX Page 5 ECEn 224 Multiplexers

6 © 2003-2008 BYU 09 MUX Page 6 ECEn 224 Multiplexers AB S 00011110 0 1

7 © 2003-2008 BYU 09 MUX Page 7 ECEn 224 Multiplexers Q = S’A + SB AB S 00011110 011 111 A B S Q

8 © 2003-2008 BYU 09 MUX Page 8 ECEn 224 Multiplexers Z = A’B’I 0 + A’BI 1 + AB’I 2 + ABI 3 4:1 MUX I0I1I2I3I0I1I2I3 Z  A B Data Inputs Control Inputs 

9 © 2003-2008 BYU 09 MUX Page 9 ECEn 224 8 to 1 Multiplexer 8:1 MUX I0I1I2I3I0I1I2I3 Z A B CA B C Data Inputs Control Inputs I4I5I6I7I4I5I6I7 Z = A’B’C’I 0 + A’B’CI 1 + A’BC’I 2 + …

10 © 2003-2008 BYU 09 MUX Page 10 ECEn 224 A General MUX I 0 I 1 … I N-1 Z s k-1 …..s 0 N Data Inputs log 2 (N) Control Inputs Output N:1 MUX …

11 © 2003-2008 BYU 09 MUX Page 11 ECEn 224 A 3:1 MUX? Q = A’B’I 0 + A’BI 1 + AB’I 2 3:1 MUX I0I1I2I0I1I2 Q A B What happens when AB = 11? Often we just use a 4:1 MUX and leave I 3 unconnected.

12 © 2003-2008 BYU 09 MUX Page 12 ECEn 224 Multiplexers In A Microprocessor Each signal here is a 16-bit wide bus –A 16-bit wide MUX is simply 16 1-bit wide MUXes all with common select inputs

13 © 2003-2008 BYU 09 MUX Page 13 ECEn 224 Select control lines bit 0 16-bit 3:1 MUX Example 00 01 10 11 bit 0 BusA BusB BusC

14 © 2003-2008 BYU 09 MUX Page 14 ECEn 224 Select control lines bit 1 16-bit 3:1 MUX Example 00 01 10 11 bit 1 BusA BusB BusC

15 © 2003-2008 BYU 09 MUX Page 15 ECEn 224 BusC BusB They all use the same select control lines… One bit from each bus goes to each MUX The result is a 16-bit bus s1s1 s0s0 00 01 10 11 bit 0 00 01 10 11 00 01 10 11 bit 1bit 15 … BusA 16-bit 3:1 MUX Example Output 00 01 10 11 bit 2

16 © 2003-2008 BYU 09 MUX Page 16 ECEn 224 Implementing Logic with MUX Blocks

17 © 2003-2008 BYU 09 MUX Page 17 ECEn 224 Example 1 A=0 part of the truth table … when A=0, F=0 A=1 part of the truth table … when A=1, F=B+C 0101 0 B+C A F Using A as the select input …

18 © 2003-2008 BYU 09 MUX Page 18 ECEn 224 Example 2 B=0 part of the truth table … when B=0, F=AC B=1 part of the truth table … when B=1, F=A 0101 AC A B F Using B as the select input …

19 © 2003-2008 BYU 09 MUX Page 19 ECEn 224 Example 3 C=0 part of the truth table … when C=0, F=AB C=1 part of the truth table … when C=1, F=A 0101 AB A C F All 3 of these examples are the same truth table… Using C as the select input …

20 © 2003-2008 BYU 09 MUX Page 20 ECEn 224 Using a Bigger MUX AB=00 part of the truth table … when AB=00, F=0 AB F AB=01 part of the truth table … when AB=01, F=C’ AB=10 part of the truth table … when AB=10, F=1 AB=11 part of the truth table … when AB=11, F=C 00 01 10 11 0 C’ 1 C Can easily re-order truth table to use different MUX control inputs Using AB as the select input …

21 © 2003-2008 BYU 09 MUX Page 21 ECEn 224 Another 4:1 MUX Example AB F 00 01 10 11 1 1 0 1 This shows that a large enough MUX can directly implement a truth table…

22 © 2003-2008 BYU 09 MUX Page 22 ECEn 224 Implementing Logic Functions With Muxes Implement: Z = A ’ B + BC ’ 4-to-1 MUX Z A B I0I1I2I3I0I1I2I3

23 © 2003-2008 BYU 09 MUX Page 23 ECEn 224 Implementing Logic Functions With Muxes Implement: Z = A ’ B + BC ’ 4-to-1 MUX Z A B I0I1I2I3I0I1I2I3 for AB=00, Z=0 0

24 © 2003-2008 BYU 09 MUX Page 24 ECEn 224 Implementing Logic Functions With Muxes 4-to-1 MUX Z A B I0I1I2I3I0I1I2I3 0 for AB=01, Z=1 1 Implement: Z = A ’ B + BC ’

25 © 2003-2008 BYU 09 MUX Page 25 ECEn 224 Implementing Logic Functions With Muxes 4-to-1 MUX Z A B I0I1I2I3I0I1I2I3 0 1 for AB=10, Z=0 Implement: Z = A ’ B + BC ’ 0

26 © 2003-2008 BYU 09 MUX Page 26 ECEn 224 Implementing Logic Functions With Muxes 4-to-1 MUX Z A B I0I1I2I3I0I1I2I3 0 1 for AB=11, Z=C’ C’ Implement: Z = A ’ B + BC ’ 0

27 © 2003-2008 BYU 09 MUX Page 27 ECEn 224 Implementing Logic Functions With Muxes An alternate method 4-to-1 MUX Z A B I0I1I2I3I0I1I2I3 0 1 C’ 0 Z = A’B + BC’ A=0 B=0 A=0 B=1 A=1 B=0 A=1 B=1 Z = 10 + 0 C’ = 0 Z = 1 1 + 1 C’ = 1 Z = 0 0 + 0 C’ = 0 Z = 0 1 + 1 C’ = C’

28 © 2003-2008 BYU 09 MUX Page 28 ECEn 224 Implementing Logic Functions With Muxes Z (A,B,C,D) =  m(3,5,10,11,12,15) +  d (4,8,14) 0 1 3 2 4 5 7 6 12 13 15 14 8 9 11 10

29 © 2003-2008 BYU 09 MUX Page 29 ECEn 224 Implementing Logic Functions With Muxes 0 1 3 2 4 5 7 6 12 13 15 14 8 9 11 10 X X X Z (A,B,C,D) =  m(3,5,10,11,12,15) +  d (4,8,14)

30 © 2003-2008 BYU 09 MUX Page 30 ECEn 224 Implementing Logic Functions With Muxes Z (A,B,C,D) =  m(3,5,10,11,12,15) +  d (4,8,14) 8-to-1 MUX Z A B C I0I1I2I3I4I5I6I7I0I1I2I3I4I5I6I7

31 © 2003-2008 BYU 09 MUX Page 31 ECEn 224 Implementing Logic Functions With Muxes Z (A,B,C,D) =  m(3,5,10,11,12,15) +  d (4,8,14) 8-to-1 MUX Z A B C I0I1I2I3I4I5I6I7I0I1I2I3I4I5I6I7 0

32 © 2003-2008 BYU 09 MUX Page 32 ECEn 224 Implementing Logic Functions With Muxes Z (A,B,C,D) =  m(3,5,10,11,12,15) +  d (4,8,14) 8-to-1 MUX Z A B C I0I1I2I3I4I5I6I7I0I1I2I3I4I5I6I7 0D0D

33 © 2003-2008 BYU 09 MUX Page 33 ECEn 224 Implementing Logic Functions With Muxes Z (A,B,C,D) =  m(3,5,10,11,12,15) +  d (4,8,14) 8-to-1 MUX Z A B C I0I1I2I3I4I5I6I7I0I1I2I3I4I5I6I7 0D10D1

34 © 2003-2008 BYU 09 MUX Page 34 ECEn 224 Implementing Logic Functions With Muxes Z (A,B,C,D) =  m(3,5,10,11,12,15) +  d (4,8,14) 8-to-1 MUX Z A B C I0I1I2I3I4I5I6I7I0I1I2I3I4I5I6I7 0D100D10

35 © 2003-2008 BYU 09 MUX Page 35 ECEn 224 Implementing Logic Functions With Muxes Z (A,B,C,D) =  m(3,5,10,11,12,15) +  d (4,8,14) 8-to-1 MUX Z A B C I0I1I2I3I4I5I6I7I0I1I2I3I4I5I6I7 0D1000D100

36 © 2003-2008 BYU 09 MUX Page 36 ECEn 224 Implementing Logic Functions With Muxes Z (A,B,C,D) =  m(3,5,10,11,12,15) +  d (4,8,14) 8-to-1 MUX Z A B C I0I1I2I3I4I5I6I7I0I1I2I3I4I5I6I7 0D10010D1001

37 © 2003-2008 BYU 09 MUX Page 37 ECEn 224 Implementing Logic Functions With Muxes Z (A,B,C,D) =  m(3,5,10,11,12,15) +  d (4,8,14) 8-to-1 MUX Z A B C I0I1I2I3I4I5I6I7I0I1I2I3I4I5I6I7 0 D 1 0 1 D’

38 © 2003-2008 BYU 09 MUX Page 38 ECEn 224 Implementing Logic Functions With Muxes Z (A,B,C,D) =  m(3,5,10,11,12,15) +  d (4,8,14) 8-to-1 MUX Z A B C I0I1I2I3I4I5I6I7I0I1I2I3I4I5I6I7 0 D 1 0 1 D’ 1

39 © 2003-2008 BYU 09 MUX Page 39 ECEn 224 Implementing Logic Functions With Muxes Z (A,B,C,D) =  m(3,5,10,11,12,15) +  d (4,8,14) 8-to-1 MUX Z A C D I0I1I2I3I4I5I6I7I0I1I2I3I4I5I6I7

40 © 2003-2008 BYU 09 MUX Page 40 ECEn 224 Implementing Logic Functions With Muxes Z (A,B,C,D) =  m(3,5,10,11,12,15) +  d (4,8,14) 8-to-1 MUX Z A C D I0I1I2I3I4I5I6I7I0I1I2I3I4I5I6I7 0

41 © 2003-2008 BYU 09 MUX Page 41 ECEn 224 Implementing Logic Functions With Muxes Z (A,B,C,D) =  m(3,5,10,11,12,15) +  d (4,8,14) 8-to-1 MUX Z A C D I0I1I2I3I4I5I6I7I0I1I2I3I4I5I6I7 0B0B

42 © 2003-2008 BYU 09 MUX Page 42 ECEn 224 Implementing Logic Functions With Muxes Z (A,B,C,D) =  m(3,5,10,11,12,15) +  d (4,8,14) 8-to-1 MUX Z A C D I0I1I2I3I4I5I6I7I0I1I2I3I4I5I6I7 0B00B0

43 © 2003-2008 BYU 09 MUX Page 43 ECEn 224 Implementing Logic Functions With Muxes Z (A,B,C,D) =  m(3,5,10,11,12,15) +  d (4,8,14) 8-to-1 MUX Z A C D I0I1I2I3I4I5I6I7I0I1I2I3I4I5I6I7 0 B 0 B’

44 © 2003-2008 BYU 09 MUX Page 44 ECEn 224 Implementing Logic Functions With Muxes Z (A,B,C,D) =  m(3,5,10,11,12,15) +  d (4,8,14) 8-to-1 MUX Z A C D I0I1I2I3I4I5I6I7I0I1I2I3I4I5I6I7 0 B 0 B’ 1

45 © 2003-2008 BYU 09 MUX Page 45 ECEn 224 Implementing Logic Functions With Muxes Z (A,B,C,D) =  m(3,5,10,11,12,15) +  d (4,8,14) 8-to-1 MUX Z A C D I0I1I2I3I4I5I6I7I0I1I2I3I4I5I6I7 0 B 0 B’ 1 0

46 © 2003-2008 BYU 09 MUX Page 46 ECEn 224 Implementing Logic Functions With Muxes Z (A,B,C,D) =  m(3,5,10,11,12,15) +  d (4,8,14) 8-to-1 MUX Z A C D I0I1I2I3I4I5I6I7I0I1I2I3I4I5I6I7 0 B 0 B’ 1 0 1

47 © 2003-2008 BYU 09 MUX Page 47 ECEn 224 Implementing Logic Functions With Muxes Z (A,B,C,D) =  m(3,5,10,11,12,15) +  d (4,8,14) 8-to-1 MUX Z A C D I0I1I2I3I4I5I6I7I0I1I2I3I4I5I6I7 0 B 0 B’ 1 0 1

48 © 2003-2008 BYU 09 MUX Page 48 ECEn 224 Implementing Logic Functions With Muxes An alternate method 8-to-1 MUX Z A C D I0I1I2I3I4I5I6I7I0I1I2I3I4I5I6I7 Z = AC + AD’ + A’BC’ + B’CD

49 © 2003-2008 BYU 09 MUX Page 49 ECEn 224 Implementing Logic Functions With Muxes An alternate method A C D Z = AC + AD’ + A’BC’ + B’CD 0 0 0 Z = (0)(0) + (0)(1) + (1)B(1) + B’(0)(0) = B 0 0 1 Z = (0)(0) + (0)(0) + (1)B(1) + B’(0)(1) = B 0 1 0 Z = (0)(1) + (0)(1) + (1)B(0) + B’(1)(0) = 0 0 1 1 Z = (0)(1) + (0)(0) + (1)B(0) + B’(1)(1) = B’ 1 0 0 Z = (1)(0) + (1)(1) + (0)B(1) + B’(0)(0) = 1 1 0 1 Z = (1)(0) + (1)(0) + (0)B(1) + B’(0)(1) = 0 1 1 0 Z = (1)(1) + (1)(1) + (0)B(0) + B’(1)(0) = 1 1 1 1 Z = (1)(1) + (1)(0) + (0)B(1) + B’(1)(1) = 1

50 © 2003-2008 BYU 09 MUX Page 50 ECEn 224 Implementing Logic Functions With Muxes An alternate method 8-to-1 MUX Z A C D I0I1I2I3I4I5I6I7I0I1I2I3I4I5I6I7 B 0 B’ 1 0 1 Z = AC + AD’ + A’BC’ + B’CD

51 © 2003-2008 BYU 09 MUX Page 51 ECEn 224 A C D Alternate Method Original Method 0 0 0 Z = BZ = 0 0 0 1 Z = BZ = B 0 1 0 Z = 0Z = 0 0 1 1 Z = B’Z = B’ 1 0 0 Z = 1Z = 1 1 0 1 Z = 0Z = 0 1 1 0 Z = 1Z = 1 1 1 1 Z = 1Z = 1 Implementing Logic Functions With Muxes An alternate method Why are they different?

52 © 2003-2008 BYU 09 MUX Page 52 ECEn 224 Implementing Logic Functions With Muxes Z = AC + AD’ + A’BC’ + B’CD The original method used this grouping. X was determined to be “0”.

53 © 2003-2008 BYU 09 MUX Page 53 ECEn 224 Implementing Logic Functions With Muxes Z = AC + AD’ + A’BC’ + B’CD The alternate method used this grouping. X was determined to be “1”.

54 © 2003-2008 BYU 09 MUX Page 54 ECEn 224 Implementing Logic Functions With Muxes An alternate method Z = AC + AD’ + A’BC’ + B’CD The new method used this grouping. X was determined to be “1”. Which is right?? They both are!!!!

55 © 2003-2008 BYU 09 MUX Page 55 ECEn 224 Implementing Logic Functions With Muxes Z (A,B,C,D) =  m(3,5,10,11,12,15) +  d (4,8,14) 4-to-1 MUX Z A C I0I1I2I3I0I1I2I3 B D’ 1 F = A’B’CD = (0)’B’(1)D = B’D

56 © 2003-2008 BYU 09 MUX Page 56 ECEn 224 Implementing Logic Functions With Muxes An alternate method A C Z = AC + AD’ + A’BC’ + B’CD 0 0 Z = (0)(0) + (0)D’ + (1)B(1) + B’(0)D = B 0 1 Z = (0)(1) + (0)D’ + (1)B(0) + B’(1)D = B’D 1 0 Z = (1)(0) + (1)D’ + (0)B(1) + B’(0)D = D’ 1 1 Z = (1)(1) + (1)D’ + (0)B(0) + B’(1)D = 1 Same as before!

57 © 2003-2008 BYU 09 MUX Page 57 ECEn 224 Decoders

58 © 2003-2008 BYU Decoder Symbol F0 F1 F2 F3 I1 I0

59 © 2003-2008 BYU Decoder Behavior 0 0 F0 F1 F2 F3 I1 I0 1 0 0 0 0 1 F0 F1 F2 F3 I1 I0 0 1 0 0 1 0 F0 F1 F2 F3 I1 I0 0 0 1 0 1 1 F0 F1 F2 F3 I1 I0 0 0 0 1 Key idea:The device decodes an input bus by asserting the appropriate output. This is called a 2:4 decoder (pronounced “two-to-four”)

60 © 2003-2008 BYU 09 MUX Page 60 ECEn 224 2:4 Decoder A B Q0 Q1 Q2 Q3 2:4 Decoder

61 © 2003-2008 BYU 09 MUX Page 61 ECEn 224 2:4 Decoder Q0 = A’B’= m0 Q1 = A’B= m1 Q2 = AB’= m2 Q3 = AB = m3 A decoder is a minterm generator… A B Q0 Q1 Q2 Q3 2:4 Decoder

62 © 2003-2008 BYU 09 MUX Page 62 ECEn 224 3:8 Decoder Q0 = A’B’C’= m0 Q1 = A’B’C= m1 Q2 = A’BC’= m2… Q7 = ABC = m7 3:8 Decoder

63 © 2003-2008 BYU 09 MUX Page 63 ECEn 224 Implementing Logic With Decoders 2:4 Decode F =  m(0, 2) F =  m(0, 3) 2:4 Decode F =  M(1, 2) Historically, some decoders have come with inverted outputs… 2:4 Decode m0 m2 m1 m2 M0 M3

64 © 2003-2008 BYU 09 MUX Page 64 ECEn 224 Uses of Decoders Decode 3-bit op-code into a set of 8 signals op2 op1 op0 ADD SUB AND XOR NOT LOAD STORE JUMP 3:8 Decoder

65 © 2003-2008 BYU 09 MUX Page 65 ECEn 224 ROM: Read Only Memory

66 © 2003-2008 BYU 09 MUX Page 66 ECEn 224 ROM: Read-Only Memory Can read values from it Cannot write to it Often used as lookup tables and called LUTs

67 © 2003-2008 BYU 09 MUX Page 67 ECEn 224 ROM: Read-Only Memory Example: 8-entry ROM with 1-bit output  8x1 Each entry is 1 bit 8 x 1 ROM Addr In Data Out

68 © 2003-2008 BYU 09 MUX Page 68 ECEn 224 ROM: Read-Only Memory Example: 8-entry ROM with 5-bit output  8x5 Each entry is a 5-bit word 8 x 5 ROM Addr In Data Out

69 © 2003-2008 BYU 09 MUX Page 69 ECEn 224 Each minterm of each function can be specified Read Only Memory (ROM) 3 Inputs Lines ABCABC F 4 F 3 F 2 F 1 F 0 5 Outputs Lines ROM 8 words x 5 bits When you program a ROM, you are specifying this

70 © 2003-2008 BYU 09 MUX Page 70 ECEn 224 ROM – View #1 An addressable memory –Send in address ( addr ) –Receive data ( d ) stored at that location –Can have multi-bit data addr0 addr1 addr2 8 x 5 ROM d4 d3 d2 d1 d0

71 © 2003-2008 BYU 09 MUX Page 71 ECEn 224 A hardware implementation of a truth table ROM – View #2 8 x 1 ROM C B B A F A B C F

72 © 2003-2008 BYU 09 MUX Page 72 ECEn 224 ROM – Two Different Views Both views are accurate

73 © 2003-2008 BYU 09 MUX Page 73 ECEn 224 ROM Internal Structure...... n Input Lines n:2 n decoder... m Output Lines...... Memory Array 2 n words x m bits

74 © 2003-2008 BYU 09 MUX Page 74 ECEn 224 ROM Memory Array ABCABC m 0 =A’B’C’ m 1 =A’B’C m 2 =A’BC’ m 3 =A’BC m 4 =AB’C’ m 5 =AB’C m 6 =ABC’ m 7 =ABC F 4 F 3 F 2 F 1 F 0 F 0 = m0 + m3 F 1 = m2 + m7 F 2 = m4 + m6 F 3 = m0 + m1 + m2 + m5 F 4 = m1 + m4 + m7 3:8 Decoder  Diode - acts like a one-way conduit. Its presence causes the column to become ‘1’ when the row is decoded. Resistor – pulls column down to ‘0’ if no row wire drives it high. 0V

75 © 2003-2008 BYU 09 MUX Page 75 ECEn 224 ROM Memory Array ABCABC m 0 =A’B’C’ m 1 =A’B’C m 2 =A’BC’ m 3 =A’BC m 4 =AB’C’ m 5 =AB’C m 6 =ABC’ m 7 =ABC F 4 F 3 F 2 F 1 F 0 3:8 Decoder 0V ABCF4F4 F3F3 F2F2 F1F1 F0F0 00001001 00111000 01001010 01100001 10010100 10101000 11000100 11110010

76 © 2003-2008 BYU 09 MUX Page 76 ECEn 224 ROM Technologies: Not Always Diode-Based PROM (Programmable Read Only Memory) –Mask programmable –Fusible Link EPROM (Erasable PROM) –Can be erased with ultraviolet light EEPROM (Electronically Erasable PROM) –Can be electrically erased Flash –Can also be electronically erased –Available in very high densities –Used in cell phones, MP3 players, cameras, and more! The details of these technologies are beyond the scope of this class.

77 © 2003-2008 BYU 09 MUX Page 77 ECEn 224 Using a ROM For Logic F = AB + A’BC’ G = A’B’C + C’ H = AB’C’ + ABC’ + A’B’C

78 © 2003-2008 BYU 09 MUX Page 78 ECEn 224 F = AB + A’BC’ G = A’B’C + C’ H = AB’C’ + ABC’ + A’B’C Using a ROM For Logic

79 © 2003-2008 BYU 09 MUX Page 79 ECEn 224 F = AB + A’BC’ G = A’B’C + C’ H = AB’C’ + ABC’ + A’B’C Using a ROM For Logic Just fill out the truth table CAD tools usually do the rest… What size ROM is this?

80 © 2003-2008 BYU 09 MUX Page 80 ECEn 224 Using ROM for Combinational Logic ROM16X1 INIT=???? a3 a2 a1 a0 ROM16X1 is a Xilinx cell Insert it into schematics like any other primitive Set its contents by double-clicking on inserted cell in schematic. A B C D

81 © 2003-2008 BYU 09 MUX Page 81 ECEn 224 Using ROM for Combinational Logic ROM16X1 INIT=840D a3 a2 a1 a0 8 1000 0100 0000 1101 40D A B C D Note that ABCD = 0000 is the least significant bit

82 © 2003-2008 BYU 09 MUX Page 82 ECEn 224 ROM Types in Xilinx FPGAs ROM16X1 = 4-input LUT –Specify INIT contents with 4-digit HEX value ROM32X1 = 5-input LUT –Specify INIT contents with 8-digit HEX value


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