1. SOUTHERN TAIWAN UNIVERSITY Department of Electrical Engineering SEMINAR DESIGN A DIRECT DIGITAL SYNTHESIS (DDS) USING FPGA Student: Dang Thanh Trung May 16 th,2012

2. OUTLINE 1.Introduction 2.DDS block diagram and waveforms 3.The structure of DDS on FPGA 4.Simulation result 5.Conclusions 6.References

3. 1.Introduction Direct Digital Synthesis (DDS) is a type of frequency synthesis for using digital data processing blocks as a means to generate a frequency and phase tunable output signal referenced to a fixed-frequency precision clock source. Applications of DDS include: signal generation, local oscillators in communication systems, function generators, mixers, modulators, sound synthesizers,…

4. 2. DDS block diagram and waveforms

5. ΔØ : Frequency Word N: The length in bits of frequency word F clk = Sample CLK Input frequency

6. Q D C D C Q Q D C Data(15:0) Clk DataA(15:0) DataB(15:0) CI Result(15:0) CO Phase_16(15:0 ) Adder_1 Fd1 Fd2 Fd3 Phase accumulator 3. The structure of DDS on FPGA Result(n+1) = Result(n) +Data(n)

7. 3. The structure of DDS on FPGA Q D C DataA(15:0) DataB(15:0) Result(15:0 ) Adder_2 Phase_16(15:0) Phase_offset(15:0) Clk mbs_1 Phase_7(6:0 ) Fd4 "1111111 " Phase_sum(15) Phase_sum(14) Phase_sum(13:7 ) Mux QD C Q D C Fd5 Fd6 Phase Modulation

8. 3. The structure of DDS on FPGA QD C Q D C Fd7 Fd8 Mux ROM INVERT Phase_7(6:0) mbs_ 1 table_value(6:0) Clk data_DAC(6:0) sign_DAC Sin ROM table

9. 4. Simulation result EX: frequency word ( N = 32 bits) ΔØ = “00001000000000000000000000000000” We have: f out =2 27 *F clk 2 32 T out =2 5 Tclk = 32 T clk

10. Conclusions From Simulation result, we can see that output signal exactly

11. References [1] H. T. Nicholas, H. Samueli, and B. Kim, "The Optimization of Direct Digital Frequency Synthesizer Performance in the Presence of Finite Word Length Effects," in Proc. 42nd Annu. Frequency Contr. Symp., 1988, pp. 357-363. [2] M. Duhalde, and A. Greiner, "A High Performance Modular Embedded ROM Architecture", in Proc. ISCAS, May 1995, pp. 1057-1060. [3] A. B. Grebene, Bipolar and MOS Analog Integrated Circuit Design. John Wiley & Sons, New York 1984. [4] C. A. A. Bastiaansen, D. W. J. Groeneveld, H. J. Schouwenaars, and H. A. H. Termeer, "A 10-b 40-MHz 0.8-mm CMOS Current-Output D/A- Converter”, IEEE JSSC, Vol. 26, No. 7, pp. 917-921, July 1991 [5] Jouko Vankka, Mikko Waltari, Marko Kosunen, Kari Halonen ”A DIRECT DIGITAL SYNTHESIZER WITH AN ON-CHIP D/A- CONVERTER”. [6]. Chang K.C (1999), Digital Systems Design with VHDL and Synthesis— An Integrated Approach, Los Alamitos, CA: IEEE Computer Society Press. [7]. Steve Kilts (2007),Advanced FPGA Design: Architecture, Implementation and Optimization, New York.