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MPP 4 th March - 1v0 CERN MPP CERN MPP SMP Team 3.

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Presentation on theme: "MPP 4 th March - 1v0 CERN MPP CERN MPP SMP Team 3."— Presentation transcript:

1

2 SMP @ MPP 4 th March - 1v0

3 CERN bis-smp-team@cern.ch SMP @ MPP bis-smp-team@cern.ch CERN SMP @ MPP SMP Team 3

4 CERN bis-smp-team@cern.ch SMP @ MPP Menu Introduction Hardware Testing and Testers Software User Interface B. Todd M. Kwiatkowski S. Gabourin I. Romera M. Audrain 4 Status & FutureI. Romera

5 CERN bis-smp-team@cern.ch SMP @ MPP SMP 3v0 Introduction

6 CERN bis-smp-team@cern.ch SMP @ MPP SMP 3v0 - Introduction 6 *fast *safe *reliable *available generates flags & values afe achine arameters SM P and / ordirectly transmittedbroadcast receives accelerator information injection procedureprotection configuration CERN = System Safety Beam Interlocks Collimation Beam Loss Monitors … Extraction Interlocks

7 CERN bis-smp-team@cern.ch SMP @ MPP CERN bis-smp-team@cern.ch SMP @ MPP Two Controllers 7

8 CERN bis-smp-team@cern.ch SMP @ MPP SPS Parameters

9 CERN bis-smp-team@cern.ch SMP @ MPP SPS Probe Beam Flag 9 Fail-Safe = FALSE Fail-Safe = 1.6777215e15

10 CERN bis-smp-team@cern.ch SMP @ MPP SPS Setup Beam Flag 10 Fail-Safe = FALSE Fail-Safe = 6.5535e14

11 CERN bis-smp-team@cern.ch SMP @ MPP Probe / Setup Timing 11

12 CERN bis-smp-team@cern.ch SMP @ MPP SPS Energy Flags 12 Fail-Safe = FALSE Fail-Safe = 524.280 GeV

13 CERN bis-smp-team@cern.ch SMP @ MPP SPS Energy Flags 13

14 CERN bis-smp-team@cern.ch SMP @ MPP SPS Energy Flags 14

15 CERN bis-smp-team@cern.ch SMP @ MPP LHC Parameters

16 CERN bis-smp-team@cern.ch SMP @ MPP LHC Energy 16 Fail-Safe = 7864.200 GeV

17 CERN bis-smp-team@cern.ch SMP @ MPP LHC Intensity 17 Fail-Safe = 1.6777215e15Fail-Safe = 6.5535e14

18 CERN bis-smp-team@cern.ch SMP @ MPP LHC Set-up Beam Flag 18

19 CERN bis-smp-team@cern.ch SMP @ MPP LHC Set-up Beam Flag 19 Fail-Safe = FALSE

20 CERN bis-smp-team@cern.ch SMP @ MPP LHC Set-up Beam Flag 20

21 CERN bis-smp-team@cern.ch SMP @ MPP LHC Set-up Beam Flag 21

22 CERN bis-smp-team@cern.ch SMP @ MPP LHC Beam Presence Flag 22

23 CERN bis-smp-team@cern.ch SMP @ MPP LHC Beam Presence Flag 23 Fail-Safe = FALSE

24 CERN bis-smp-team@cern.ch SMP @ MPP Squeezing Factors 24 Fail-Safe = 0m

25 CERN bis-smp-team@cern.ch SMP @ MPP Moveable Devices and Stable Beams 25

26 CERN bis-smp-team@cern.ch SMP @ MPP Moveable Devices and Stable Beams 26 Operator: <10 GeV window between LIMITs

27 CERN bis-smp-team@cern.ch SMP @ MPP Moveable Devices and Stable Beams 27

28 CERN bis-smp-team@cern.ch SMP @ MPP Moveable Devices and Stable Beams 28 Operator: <1m window between LIMITs

29 CERN bis-smp-team@cern.ch SMP @ MPP Moveable Devices and Stable Beams 29

30 CERN bis-smp-team@cern.ch SMP @ MPP Moveable Devices and Stable Beams 30

31 CERN bis-smp-team@cern.ch SMP @ MPP Dependable Electronics Basis

32 CERN bis-smp-team@cern.ch SMP @ MPP VME Chassis & Generic Circuit - CISX 32 Receiver – CISR Generator LHC – CISGL Generator SPS – CISGS Arbiter – CISA or

33 CERN bis-smp-team@cern.ch SMP @ MPP VME Chassis & Generic Circuit - CISX 33 Receiver – CISR Generator LHC – CISGL Generator SPS – CISGS Arbiter – CISA Monitor FPGA Control FPGA VHDL implementation Safety approach?

34 CERN bis-smp-team@cern.ch SMP @ MPP Hardware Dependable Design

35 CERN bis-smp-team@cern.ch SMP @ MPP Design flow

36 CERN bis-smp-team@cern.ch SMP @ MPP Requirements 36 Requirements requested by operators and/or approved by MPP. E.G. Set-up Beam Flag equation normal relaxed very relaxed ion

37 CERN bis-smp-team@cern.ch SMP @ MPP Specification and formalisation English + diagramspredicate logic vs English languageformal language Unlike the English, there is only one way to understand formal language.

38 CERN bis-smp-team@cern.ch SMP @ MPP Specification and formalisation English + diagramspredicate logic vs English languageformal language Unlike the English, there is only one way to understand formal language.

39 CERN bis-smp-team@cern.ch SMP @ MPP Functional blocks 39

40 CERN bis-smp-team@cern.ch SMP @ MPP Design flow

41 CERN bis-smp-team@cern.ch SMP @ MPP Implementation VHDL is not a programming language. It is a Hardware Description Language Must understand expected synthesis result comments and naming convention important for the code review Critical code = strict Non-Critical code = engineer has freedom High % code reuse

42 CERN bis-smp-team@cern.ch SMP @ MPP Design flow

43 CERN bis-smp-team@cern.ch SMP @ MPP Simulation Unit Under Test Bus Functional Model Register Transfer Level

44 CERN bis-smp-team@cern.ch SMP @ MPP Simulation Test-bench = software wrapped around model Simulation tool can examine code coverage response should be correct for all stimulus

45 CERN bis-smp-team@cern.ch SMP @ MPP Design flow

46 CERN bis-smp-team@cern.ch SMP @ MPP Hardware tester DeviceUnder Test

47 CERN bis-smp-team@cern.ch SMP @ MPP Hardware tester similar to simulation but real hardware embedded logic analyzers provided by FPGA vendors Chip Scope, SignalTap, … Hardware response should be correct for each stimulus

48 CERN bis-smp-team@cern.ch SMP @ MPP Hardware tester vs. simulation Complementary Software simulation:Hardware tester: source code tracking code coverage real time real distortions

49 CERN bis-smp-team@cern.ch SMP @ MPP Hardware Dependable Design Summary Our approach – dependable PLD design goes on top of dependable electronics design exhaustive source code simulation full code coverage hardware testers formalisation of the specification split critical – non-critical reduction to minimum function code reviews external reviews

50 CERN bis-smp-team@cern.ch SMP @ MPP System Testing & Testers The “V” Approach

51 CERN bis-smp-team@cern.ch SMP @ MPP SMP Development: the “V” approach 51 English Specification used for the Tester Determine Tests needed to verify each function Developed Independently of Controller Validation of Controller versus Tester versus English Specification

52 CERN bis-smp-team@cern.ch SMP @ MPP What is the SMP Tester? 52 Definition : Ensure the SMP controller works as specified Roles : Simulates the inputs Analyzes the outputs

53 CERN bis-smp-team@cern.ch SMP @ MPP Functionalities of the SMP tester 53

54 CERN bis-smp-team@cern.ch SMP @ MPP Test of the SPS Probe-Beam Flag 54 Control of the test coverage Excel input files Both A and B intensities valid PROBE_BEAM_LIMIT TRUE FALSE

55 CERN bis-smp-team@cern.ch SMP @ MPP SPS Probe-Beam Flag: Test Protocol 55

56 CERN bis-smp-team@cern.ch SMP @ MPP SPS Probe-Beam Flag: Display Results 56 LabVIEW SubPanel Excel file Text File

57 CERN bis-smp-team@cern.ch SMP @ MPP Tester Summary 57 What it does: - Replaces all elements connected to the SMP - Tests automatically many input combinations - Validates the boards for the operation

58 CERN bis-smp-team@cern.ch SMP @ MPP Software FESA – RBAC – MCS – Checks - GUI

59 CERN bis-smp-team@cern.ch SMP @ MPP Introduction 59 FESA class RBAC protection and MCS Operational checks SMP-GUI

60 CERN bis-smp-team@cern.ch SMP @ MPP FESA class 60 FESA class provides access to hardware registers no complex logic behind, just valid range checks Different type of access read-only access for everyone write access for experts trough dedicated expert properties write access for critical registers for operation

61 CERN bis-smp-team@cern.ch SMP @ MPP FESA class 61

62 CERN bis-smp-team@cern.ch SMP @ MPP RBAC and MCS configuration 62 SPS PropertyRolesApplicationsLocationMCS ProbeBeamLimitLHC-OP, LHC-EIC, MCS-SMPSEQUENCERX PropertyRolesApplicationsLocationMCS SqueezingFactorLHC-OP, LHC-EIC, MCS-SMPSISSIS-HOSTS SqueezingFactorLimitsLHC-OP, LHC-EIC, MCS-SMPSEQUENCERX PhysicsEnergyLimitsLHC-OP, LHC-EIC, MCS-SMPSEQUENCERX BeamModeLHC-OP, LHC-EIC, MCS-SMPSEQUENCER ForceSetupBeamFlagLHC-OP, LHC-EIC, MCS-SMPSMP-GUI SetupBeamFlagNormalLHC-OP, LHC-EIC, MCS-SMPSMP-GUI SetupBeamFlagSpecialSMP-THRESHOLD-EXPERTSMP-GUI ExpertRegisterSettingSMP-EXPERTSMP-GUI LHC

63 CERN bis-smp-team@cern.ch SMP @ MPP Operational checks 63 Pre-operational checks to ensure system ready for operation HW consistency vs DB, Test mode to ensure critical paths working to spec…

64 CERN bis-smp-team@cern.ch SMP @ MPP Operational checks 64 DIAMON checks to detect infrastructure issues PS, Timing, Communication problems…

65 CERN bis-smp-team@cern.ch SMP @ MPP Operational checks 65 Post-Mortem for post-operational check sequence Role played in last dump, Redundancy, Safety for next mission…

66 CERN bis-smp-team@cern.ch SMP @ MPP GUI Demonstration

67 CERN bis-smp-team@cern.ch SMP @ MPP SMP-GUI 67 GUI to monitor status of the systems (SPS and LHC) Send commands to the controllers Logged data viewer Useful tool for diagnostics Same tool used for Operators and Experts

68 CERN bis-smp-team@cern.ch SMP @ MPP Status & Future Plans

69 CERN bis-smp-team@cern.ch SMP @ MPP Q1/2 2011 69 + study intensity logic + ongoing documentation + 10 trivial issues in monitoring and diagnostics + beta Pre-Op + beta DIAMON + beta Post-Mortem

70 CERN bis-smp-team@cern.ch SMP @ MPP Q3/4 2011+ 70 + Cross-checker tester + Cross-checking hardware

71 CERN bis-smp-team@cern.ch SMP @ MPP Q3/4 2011+ 71

72 CERN bis-smp-team@cern.ch SMP @ MPP Q3/4 2011+ 72 + Cross-checker tester + Cross-checking hardware + VME Transmitter + VME Receiver

73 CERN bis-smp-team@cern.ch SMP @ MPP Q3/4 2011+ 73

74 CERN bis-smp-team@cern.ch SMP @ MPP Q3/4 2011+ 74

75 CERN bis-smp-team@cern.ch SMP @ MPP Q3/4 2011+ 75 + Cross-checker tester + Cross-checking hardware + VME Transmitter + VME Receiver + Pre-Op + DIAMON + Post-Mortem

76 CERN bis-smp-team@cern.ch SMP @ MPP In Closingfin – thank you!

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