1. TAS5768 boot up sequence 2014.July.22

2. TAS5768 boot up sequence Power ON HW reset (ensures C-RAM is default when booting) 1. Supply power all of PVdd/DVdd/Avdd – No timing requirement 2. Wait 4msec after deliver I2S clock – To create internal system clock I2S input is needed 3. Set into standby mode to allow reset: P0_R2 = 0x10 4. Reset C-RAM and all registers to default: P0_R1 = 0x11 5. Set into standby mode: P0_R2 = 0x10 Bypass mode initialization at Buffer A 1. Adjust digital gain level P0_R61-62 = 0xXX – Adjust max output power as under Speaker rated power. 2. Wake from standby mode: P0_R2 = 0x01 Beep tone can be outputted SA parameter initialization (No sound during this sequence) 1. Write data generated by default “Dump_Coef_Inst.reg” file (includes standby mode, C-RAM, I-RAM, adaptive mode, wake-up)

3. Move to sleep mode (Keep RAM data) 1.Power down request: RQPD P0 R2 b0=1 2.Shut down PVdd 3.Shut down AVdd Recover from sleep mode 1.Turn on AVdd 2.Turn on PVdd 3.Power up request: RQPD P0 R2 b0=0 TAS5768 sleep mode