1. ITRS 2001 Renewal Work In Progress - Do Not Publish!
ITRS/ORTC Table Technology Node, DRAM Key Trends, and Logic Key Trends Proposals IRC Telecon Eur /03/00 Asia /09/00 [Taipei ITRS 2001 Renewal Kickoff Prep.] Rev 0_d - 10/02/00 Contact: Alan Allan ,
ITRS 2001 Renewal Work In Progress - Do Not Publish!

2. ITRS 2001 Renewal Work In Progress - Do Not Publish!
=> 2001 Renewal: Short-Term Annual, Long-Term 3-Year Columns
=> 2001 Renewal Technology 70%/node, 50%/2 nodes
ITRS 2001 Renewal Work In Progress - Do Not Publish!

3. ITRS 2001 Renewal Work In Progress - Do Not Publish!

4. ITRS 2001 Renewal Work In Progress - Do Not Publish!
=> 2001 Renewal Long-Term Year Column
ITRS 2001 Renewal Work In Progress - Do Not Publish!

5. ITRS 2001 Renewal Work In Progress - Do Not Publish!
ITRS Roadmap Acceleration Continues... (Including MPU/ASIC “Physical Gate Length” Proposal) 95 97 99 01 04 07 10 13 16
and MPU/ASIC Gate Length Minimum Feature Size (nm)
Technology Node - DRAM Half-Pitch (nm)
500
* Note: MPU ASIC Physical Bottom Gate Length Preliminary 2000 Update still under discussion.
1994
350
250
1997
Technology Node
180
1998/1999
DRAM Half Pitch
130
2000
[7/11 IRC Proposal
Best Case Opportunity
Scenario 2.0]
XX 90
100
Minimum Feature
XX 65 70
MPU/ASIC Gate “Physical”
Alternative Scenarios:
XX 45 50
MPU/ASIC Gate “In Resist”
XX 33 35
[9/15 - Litho Proposed “In Resist” (70% of “Best Case” Half Pitch)]
XX 23
[1.0]
[1.5]
[2.0] 25
[9/15 - Litho Proposed “Physical” (1 year ahead of “In Resist”)] 16 95 97 99 01 04 07 10 13 16
~.7x per technology node (.5x per 2 nodes)
Year of Production
2001 Renewal Period
REV 1kg_c - 09/27/00
ITRS 2001 Renewal Work In Progress - Do Not Publish!

6. ITRS 2001 Renewal Work In Progress - Do Not Publish!
Summary of Key Assumption Proposed Changes WAS(1999 ITRS) vs. IS(“Best Case” Proposal) (cont.- DRAM):
DRAM Assumptions:
a) Cell Area Factor Limits (from FEP TWG):
WAS: 8x/1999 -> 6x/2002 -> 4.4x/2005 -> 3.0x/2011 -> 2.5x/2014
IS: 8x/ , 6x/ , 4x/
b) Cell Array Efficiency Limit Trends (from FEP, Nikkei Microdevices):
WAS: Intro: /70% --> 2016/75%
IS: Intro: /70% --> 2016/75%
WAS: Production 1999/53% --> 2016/57%
IS: Production 1999/53% --> 2016/58%
c) Litho Field Size Maximum Limit (from Litho TWG):
WAS: 4x Magnification, 6-inch Reticle
Intro x32 = 800mm2
Production x32 = 400mm (2 chips/field)
IS: 5x Magnification, 6-inch Reticle
Intro x26 = 572mm2
Production x26 = 286mm2 (2 chips/field)
d) Bits/Chip Product Generation Growth Rate:
WAS: : 2x bits/chip every 2 years
Introduction: Through 8Gbit: 2x bits/chip every 2 years;
After 8Gbit: 2x bits/chip every 2-3 years (4x/5years)
@ Production: Through 32Gbit: 2x bits/chip every 2 years;
After 32Gbit: 2x bits/chip every 2-3 years (4x/5years)
ITRS 2001 Renewal Work In Progress - Do Not Publish!

7. ITRS 2001 Renewal Work In Progress - Do Not Publish!
Summary of Key Assumption Proposed Changes WAS(1999 ITRS) vs. IS IS(“Best Case” Proposal) (cont.- Logic):
MPU Assumptions:
a) High Performance (HP) Starting Chip Size:
WAS: 2Mbyte on-chip (6t) SRAM in 1999
(170mm2 Core plus 280mm2 SRAM = 450mm2/1999)
IS: 1Mbyte on-chip (6t) SRAM in 1999
(170mm2 Core plus 140mm2 SRAM = 310mm2/1999)
b) Cost Performance (CP) Starting Chip Size (SAME as 1999 ITRS):
c) SRAM and Logic Transistors/chip Trend (SAME as ITRS) = 2x/2yrs
d) Chip Size Growth Rate Trend
WAS/ IS(7/11): Flat chip sizes through 2001, then 1.2x/4rs
ITRS 2001 Renewal Work In Progress - Do Not Publish!

8. ITRS 2001 Renewal Work In Progress - Do Not Publish!

9. ITRS 2001 Renewal Work In Progress - Do Not Publish!
DRAM - ORTC Chip Size Model Per IRC Technology Node Proposal [IS, 7/11/00] (cont):
ITRS 2001 Renewal Work In Progress - Do Not Publish!

10. ITRS 2001 Renewal Work In Progress - Do Not Publish!

11. ITRS Table Definitions/Guidelines - 2001 Proposal Rev0, 10/02/00
Technology Requirements Perspective
- Near-Term Years : First Yr. Ref.+ 6 yrs F’cast (ex through 2007), annually
- Long-Term Years : Following 9 years (ex.: 2010, 2013, and 2016), every 3 years
Technology Node :
- General indices of technology development.
- Approximately 70% of the preceding node, 50% of 2 preceding nodes.
- Each step represents the creation of significant technology progress
- Example: DRAM half pitches: 130, 90, 65, 45, 33, 23, 16 nm
- Smallest 1/2 pitch among DRAM, ASIC, MPU, etc
Year of Production:
- The volume = 10K units (devices)/month. ASICs manufactured by same
process technology are granted as same devices
- Beginning of manufacturing by a company and another company starts
production within 3 months　　
Technology Requirements Color :
- : Manufacturable Solutions are NOT known
: Manufacturable Solutions are known
: Manufacturable Solutions exist, and they are being optimized
- Red cannot exist in next 3 years (2001, 2002, 2003) **
- Yellow cannot exist in next 1 year (2001)
Red
Yellow
White
** Exception: Solution NOT known, but does not prevent Production manufacturing
ITRS 2001 Renewal Work In Progress - Do Not Publish!