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Comp Sci 251 -- MIPS machine 1 Ch. 3 MIPS RISC Machine.

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Presentation on theme: "Comp Sci 251 -- MIPS machine 1 Ch. 3 MIPS RISC Machine."— Presentation transcript:

1 Comp Sci 251 -- MIPS machine 1 Ch. 3 MIPS RISC Machine

2 Comp Sci 251 -- MIPS machine 2 MIPS processor Microprocessor w/o Interlocking Pipeline Stages Windows CE devices Cisco routers Sony Playstation, PS2, PSP Digital cameras

3 Comp Sci 251 -- MIPS machine 3 MIPS Processor Register file – Special high-speed memory locations – Separate from main memory Datapath Circuitry – Performs arithmetic operations – Includes 32-bit ALU Control unit – Circuitry for controlling datapath, memory, and I/O devices

4 Comp Sci 251 -- MIPS machine 4 Register file Thirty-two general purpose registers Each holds 32 bits NumberNamepurpose $0ZeroConstant 0 $1$atAssembler temp $2-$3$v0-$v1Expression eval. Return value $4-$7$a0-$a3Arguments $8-$15$t0-$t7Temporary $16-$23$s0-$s7Saved $24-$25$t8-$t9Temporary $26-$27$k0-$k1OS kernel $28$gpGlobal pointer $29$spStack pointer $30$fpFrame pointer $31$raReturn address

5 Comp Sci 251 -- MIPS machine 5 Special-purpose registers Program counter register (PC) – Holds memory address of current instruction Hi and Lo – Used for multiplication & division

6 Comp Sci 251 -- MIPS machine 6 MIPS main memory Byte-addressable memory 32-bit addresses Up to 2 32 bytes = 4 gigabytes Word size = 32 bits – Word boundaries on addresses divisible by 4

7 Comp Sci 251 -- MIPS machine 7 Program memory model Memory contains three important segments Text segment: program instructions Data segment: global variables & constants Stack segment: arguments & local variables 0x00000000 Reserved 0x00400000 Text segment 0x10000000 Data segment Stack segment 0x80000000 0xFFFFFFFF Operating system

8 Comp Sci 251 -- MIPS machine 8 Byte order 32-bit value  four consecutive bytes Example: 32-bit value 0x12345678 Two options: 12 34 56 78 56 34 12 Big-endian Little-endian Low address High address

9 Comp Sci 251 -- MIPS machine 9 Fetch-execute cycle Processor continuously does: 1. Read instruction – from text segment 2. Read operands – from registers, data segment, or stack segment 3. Perform operation 4. Store result – to register, data segment, or stack segment

10 Comp Sci 251 -- MIPS machine 10 Examples See /shared/huen/251/ch03


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