Presentation is loading. Please wait.

Presentation is loading. Please wait.

Processor Architecture Kieran Mathieson. Outline Memory CPU Structure Design a CPU Programming Design Issues.

Similar presentations


Presentation on theme: "Processor Architecture Kieran Mathieson. Outline Memory CPU Structure Design a CPU Programming Design Issues."— Presentation transcript:

1 Processor Architecture Kieran Mathieson

2 Outline Memory CPU Structure Design a CPU Programming Design Issues

3 Memory

4 Made up of bits Fixed word (cell) size Cells contain instructions and data Each word has an address Flat memory model Segmented memory model

5 CPU Structure

6 Fetch/execute cycle Registers used to operate on data Scratchpad Special-purpose registers – instruction register, instruction pointer, program status word Control unit interprets instructions Opens and closes the right gates to move data around ALU performs computations

7 Design a CPU Decimal for simplicity 1,000 word of RAM - each 4 digits long 10 registers – numbered 0 to 9 Special-purpose registers - instruction register, instruction pointer Create an instruction set Input/output Move data between registers and memory Computation Branching

8 Program Write a program to input two numbers, add them, and output Write a program to add up some numbers the user inputs The user specifies how many numbers to add

9 What It Looks Like

10 CPU Design Issues Word size CISC vs. RISC Clock speed Electrical properties – heat, circuit length, fabrication

11 Outline Memory CPU Structure Design a CPU Programming Design Issues


Download ppt "Processor Architecture Kieran Mathieson. Outline Memory CPU Structure Design a CPU Programming Design Issues."

Similar presentations


Ads by Google