1. DCS for TRD Pre-trigger Ken Oyama Jan. 22, 2007 DCS Workshop in Heidelberg

2. Jan. 22, 2007K. Oyama2 Pre-trigger System Overview CLK before after L0L1 L0 p-t T0 (anti-) coincidence BPM dec. (TTCrx) BPM enc. (TTCex) BC+L0+L1 TRD control boxes L0, L1,… + pre-trigger + fast control outside magnet inside magnet V0 TOF CTP pre-trigger + trigger info ACORDE FEB FPGA

3. Jan. 22, 2007K. Oyama3 Pre-trigger System Detail

4. Jan. 22, 2007K. Oyama4 What to be Controlled  6 KIP DCS boards (3 for primary and 3 for backup).  8 Wiener LV supplies.

5. Jan. 22, 2007K. Oyama5 Power Distribution 4 crates 18 ch. (optional) 4 crates 14 ch.  All Wiener PS, same type as for TRD but smaller current.  Special powering up methods (primary and secondary modes) are required  next slide.

6. Jan. 22, 2007K. Oyama6 Powering Up Methods (Day-I) PS Ch. [V] Purpose Normal Emergency O-08 1 -7 V0-A ON ON 2 +7 V0-A ON ON I-08 1 -7 CB-A,T0-A ON ON 2 +7 CB-A,T0-A ON ON O-29 1 -7 V0-C ON ON 2 +7 V0-C ON ON 3 -7 CB-TOF,CB-C,T0-C (primary) ON OFF 4 +7 CB-TOF,CB-C,T0-C (primary) ON OFF 5 -12 CB-TOF (primary) ON OFF 6 +12 CB-TOF (primary) ON OFF I-29 1 -12 CB-TOF (backup) OFF ON 2 +12 CB-TOF (backup) OFF ON 3 -7 CB-TOF,CB-C,T0-C (backup) OFF ON 4 +7 CB-TOF,CB-C,T0-C (backup) OFF ON Note: TRD has passive optical merger in the super-module to receive TTC (trigger and clock) via two optical fibers. If both primary and secondary system are turned on for CB-TOF, TRD will lose the TTC signal (well, will receive too many..).

7. Jan. 22, 2007K. Oyama7 DCS board FPGAs Control through DCS (I)  Use TRD standard infrastructure (IntercomLayer, FeeServer, DIM).  Retrieve configuration data only from Database. Special “tag”? PVSS wingDB command coder InterCom Layer FEE Server (Control Engine) Device Drivers SCSN + JTAG Configuration (cfdat)

8. Jan. 22, 2007K. Oyama8 Control through DCS (II)  Max 5 out of 6 will be powered up at the same time.  Do not configure primary and secondary system at the same time.  Downloading the configurations (numbers are max. per DCS board).  JTAG FPGA codes … 512k words.  SCSN LE-Discriminators thresholds … 44 words.  SCSN trigger elements delay setup… 44 words.  SCSN (anti-)Coincidence mode setup … 1 words.  TTC B-channel control (TTCrx-reset, sync, & etc)… several words.  Pre-trigger commands for TRD detectors (go to acq., ADC phase fixing, & etc). Synchronization with TRD configuration is necessary … 1 words.  Configuration script is given in “cfdat” structure of TRD.

9. Jan. 22, 2007K. Oyama9 PVSS Logging  26 temperature sensors are available in all boxes.  Live ratio and number of pre-triggers.  Health condition.

10. Jan. 22, 2007K. Oyama10 End of Run Procedure  Readout counter values. from words  44 detector counters CB-A/C 88  44 issued counters CB-A/C 88  44 accepted counters CB-A/C 88  12 trigger element counters CB-TOF 24  12 issued counters CB-TOF 24  12 accepted counters CB-TOF 24 NOTE: 44 = 12 T0 + 32 V0. 12 = 1 TRD-alive + 8 physics + 1 CB-TOF + 1 CB-A + 1 CB-C.  Reading out is done by shuttle.  Implementation will be the same as for TRD.

11. Jan. 22, 2007K. Oyama11 Summary and Plan  Pre-trigger hardware is almost in the final shape however DCS software development just has started.  Pre-trigger system needs control of only LV and Configuration through DCS board using intercom-layer.  Pre-trigger use the same framework as TRD configuration therefore implementation will be straightforward and hopefully quick.  Needs to be finished in half year.