1. 1.2 Voltage
Voltage is the energy per unit charge created by the separation, which can be expressed as

2. 1.3 The Current
The rate of flow of charges is called the current which is expressed as

3. Power
Power is defined as the time rate of expanding or absorbing energy
This shows that the power is simply the product of the current in the element and the voltage across the element

4. Passive Sign Convention

5. Figure 1.10 Charging a discharged automobile battery to illustrate the concept of power delivered to or absorbed by an element and the passive sign convention.

6. Figure Illustration of the power delivered to (absorbed by) an element and the power delivered by the element.

7. Figure 1.12 Examples of the computation of power delivered to or by an element.

8. Electric Circuit
Figure 1.13 Illustration of an electric circuit as a particular interconnection of circuit elements.

9. Kirchhoff's Current Law ( KCL):
The algebraic sum of all the currents at any node in a circuit equals zero.
Current entering the node is positive and leaving the node is negative
Current entering the node is negative and leaving the node is positive
Note the algebraic sign is regardless if the sign on the value of the current

10. Figure 1.14 Illustration of Kirchhoff ’s current law (KCL).

11. KCL also applies to larger and closed regions of circuit called supernodes

12. Example 1.3: Determine the currents ix, iy and iz
KCL at node d
ix+3=2
ix = 2-3 = -1A
KCL at node a
ix+ iy +4 = 0
iy = -3A
KCL at node b
4 + iz + 2 = 0
iz = -6A
We could have applied KCL at the supernode to get
iy + 4A + 2A = 3A
Thus iy = -3

13. Figure 1.17 Example 1.4.

14. Kirchhoff Voltage Law (KVL)
The algebraic sum of all the voltages around any closed path in a circuit equals zero.
First we have to define a closed path
A closed path or a loop is defined as starting at an arbitrary node, we trace closed path in a circuit through selected basic circuit elements including open circuit and return to the original node without passing through any intermediate node more than once
abea
bceb
cdec
aefa
abcdefa

15. Kirchhoff Voltage Law (KVL)
The algebraic sum of all the voltages around any closed path in a circuit equals zero.
The "algebraic" correspond to the reference direction to each voltage in the loop.
Assigning a positive sign to a voltage rise ( - to + )
Assigning a negative sign to a voltage drop ( + to - ) OR
Assigning a positive sign to a voltage drop ( + to - )
Assigning a negative sign to a voltage rise ( - to + )

16. Example
We apply KVL as follows:
Loop 1
Loop 2

17. Figure 1.23 Another example of the application of KVL.

18. Ex 1.8: Determine vx, vy, vz by KVL

19. Ex 1.9: Determine voltage v and current i
KVL around loop E,H,B,A,G gives
KCL at the supernode gives 1+4+ix=3, thus ix =-2A
KCL at node e gives i+3=-2, thus i=-5A

20. 1.7 Conservation of Power
The sum of powers delivered to all elements of a circuit at any time equals to zero

21. Ex 1.10 Verify conservation of power for the circuit
Element
power A
1A x 1V=1W B
-4A x 2V=-8W C
-3A x 3V=-9W D
-5A x 1V=-5W E
-3A x (-4V)=12W F
5A x (-1V)=-5W G
2A x 4V=8W H
-(-2A) x 3V=6W
ic = -3A, vc = 3V if = 5A, vf = -1V
id = -5A, vd = 1V ih = ix = -2A
ve = v = -4V

22. 1.8 Series and Parallel Connection of Elements
Figure 1.32
KVL
KCL
series connection of elements,
parallel connection of elements

23. Figure 1.33 Example to illustrate to proper classification of series and parallel connections

24. Figure E1.19 Exercise Problem 1.19.
Determine which elements are connected in series
and which elements are connected in parallel
Figure E1.19 Exercise Problem 1.19.

25. Figure E1.20 Exercise Problem 1.20.
Determine which elements are connected in series
and which elements are connected in parallel
Figure E1.20 Exercise Problem 1.20.

26. HW 1 is due now