1. WBS 1.2.8: AFE II Status and Plans Alan Bross for the DZero Central Fiber Tracker Group DZero Run IIb Detector Upgrade Director’s Review July 15, 2004 Fermilab

2. The D0 Central Fiber Tracker A little Background

3. CFT Physical Geometry  8 cylinders u Outer 6 s 2.52 m u Inner 2 s 1.66 m  16 Fiber doublet layers u 8 Axial u 8 Stereo u 1 each on each cylinder  r -.2 to.51 m  Axial readout to north  Stereo readout to south  77,000 channels  100,000 with Central and Forward Preshower Detectors

4. Waveguide Bundle Routing  Routing the optical signal to the VLPCs which sit under the CC imposes some constraints.  5 sectors  Each with different fiber run  Waveguide lengths u 7.7m min u 11.5 m max  = 8.1 m  Light Yield is a function of  Current Worst Case LY  8 pe

5. Visible Light Photon Counter  8 channel VLPC is used to readout fibers  QE  80% u Nominal Gain = 40k s But wide distribution

6. Analog Front-End (AFE) Readout Board And Why We Want to Replace It

7. Analog Front-End (AFE) Board  Approximately 200 AFE boards are needed to readout CFT (&CPS/FPS) u 512 channel (2/cassette) u Analog output via SVX IIe u Discriminator output every 396 ns for L1 trigger u MultiChip module (MCM) s SIFT chip –Analog buffer to SVX –Discriminator output s SVX IIe

8. AFE I vs. AFE II  There are a number of problems with current AFE board that impact data taking and can significantly compromise data quality for high luminosity running  The problems with the AFE board are associated with the MCM u SVX IIe u SIFT – SVX IIe interaction on MCM u Functionality limitation (by design) s Threshold setting –Zero suppression (1 setting/64 ch – SVX) (Analog information) –Discriminator (14 or 18 channels per setting)  To fix this our proposal is to build new AFE boards - AFE II u No MCM u New pipeline/Trigger Chip – TriP (and TriPt) s Pipeline s Discriminator u Commercial FADCs for analog information u FPGAs for processing s Online thresholds –one/channel (analog) –1/16 discriminators

9. AFE I Problems  SVX Saturation  At high Luminosity (high occupancy (  30%) analog signal for a given crossing will be reduced because of “history” in SVX front-end. –One reset/superbunch (12 xings)  Pedestal width and stability u Tick to Tick variations and problems within a tick u At high luminosity discriminator firing effects pedestal – requiring additional increase in thresholds. Quality of analog information is significantly degraded s At the Highest Luminosity expected for Run II, the degradation in the quality of the AFE analog information will significantly impact offline reconstruction and the Preshower capabilities. s Threshold increase as much as 4-5 pe!

10. AFE I Problems  Discriminator u At high occupancy discriminator firing will also impact the discriminators s Threshold shift as L increases.  Compounding these problems we have VLPC and fiber issues at high luminosity (instantaneous and integrated) u VLPC s Drop in gain (20%) s Drop in QE (10%) u Fiber s Radiation Damage induced light yield loss (10-20%)

11. SVX Pedestals vs. Accelerator Tick  Seen in all channels, effect is proportional to gain: Additional threshold cuts needed to suppress tick- dependent noise. accelerator tick Mean pedestal 20 counts 20 counts  1.5-2  pe

12. SVX Saturation  The SVX pipeline is only reset once per superbunch (12 xings)  At 30% occupancy u 4 Hits integrated in pipeline  “Typical” integrated charge on front end  40 pe u 40% drop in Signal for “triggered” hits Relative Signal Loss Number pe

13. Pedestal Shift- Single Channel Example  ADC spectra (from SVX) are affected by firing of SIFT discriminators  This example shows  A ped shift to the left of  1.2 pe u ADC resolution degradation s Individual pe almost gone < 1% occup. 32% occup.

14. Pedestal Shift Global  Ped shift in 4 of the 8 MCMs on an AFE  30% occupancy  Inner layer of CFT at L  10 32  Plots represent mean ped change v. channel between 0 and 32% occupancy u 2-4 pe s Large compared to 8 pe u Structure s MCM layout 32% occup.

15. Physics Impact But First – What is the light yield “If we had 100 pe/hit, I would not be talking”

16. Light Yield  These data show LY v.  for  =0  Average for each supersector  “Current worst case LY”  8 pe u This is a lower limit due to SVX sat. & ADC dynamic range  Expect Axial LY  Stereo LY  Axial Gain > Stereo Gain u SVX Sat. Effects smaller in Stereo

17. The Light Yield/Signal will get worse

18. VLPC Luminosity Dependent Effects  As luminosity goes up u VLPC QE and gain drop 0, 10, 20, 30, 40 % occupancy (expect close to 40% on inner layers at highest RunIIb L) 10% drop 20% drop QEGain

19. Fiber Radiation Damage  Dose CFT L1 u 2 fb -1 : 10 krad u 30 fb -1 : 150 krad u 90 fb -1 : 450 krad  Represents attenuation length change u 0 fb -1 : 5.0 m u 2 fb -1 : 3.8 m u 30 fb -1 : 2.7 m u 90 fb -1 : 2.1 m

20. So, What do we Conclude about Physics Impact Complicated, but…

21. CFT Data Quality at High Luminosity Degradation/loss of analog information  Tracker u Offline tracking with analog information significantly degraded s Efficient tracking may only be possible with discriminators u No chance of using pulse height to help tracking s Point set resolution s Cluster “splitting” –MC indicates that the analog information should help –Have not been able to demonstrate this with data –Even at low luminosity, AFE board analog information affects this capability  Central and Forward Preshower Detectors u Potential degradation of analog information could be crippling s These may become “Digital” devices  Even if we accept all of the above – IMPACT STILL LARGE u On Physics to Tape (NO RECOVERY POSSIBLE) u On Manpower needed to make the most of the tracking/preshower data

22. One Physics Example Silicon Track Trigger Impact on Higgs  Red curves u High/Low LY limit 03  Black u High/Low limit 06  Discriminator Hit efficiency drop due to threshold shift (0  25% occ.)  94.5%  91% u 8 out of 8  63%  47%  Zh case  h  bb u 20% Loss in STT “tagged” Higgs evts u AFEII recovers this s No Threshold shift Single-Hit efficiency Discriminator Threshold (pe)

23. AFE II Status The Sequel

24. AFE II  Progress on AFE II is covered in u D0 Notes 3898, 4009, 4076, 4233, 4497, 4500 s 3898 “Design of the new MCM” s 4009 “MCM II and the Trip Chip” s 4076 “Characterization of the TriP Chip Running at 132 ns Using a modified AFE board” s 4233 “System tests of the new electronics for the CFT and Preshower Detectors” s 4497 Z-coordinate Measurement in the CFT and the Track Search” s 4500 “Problems with the AFE operation at high rates” u Also AFE II proposal and AFE Design Specification documents  This information is in your handouts

25. AFE II  A Tremendous Effort has already gone into AFE II PPD EE Department John Anderson Jim Hoff Abder Mekkaoui Paul Rubinov D0 Alan Bross Juan Estrada Carlos Garcia Peter Hasiakos Bruce Hoeneisen Marvin Johnson Mike Utes

26. AFE II  AFE II u Full New set of boards u No SIFT No SVX – Much simpler architecture u Will use instead s Trigger Pipeline Chip: TriP (or Tript - more in a bit) –Discriminators and analog pipeline –TriP chip submission was very successful – meets spec. s Commercial Flash ADCs + FPGA for analog information s Integrates completely with existing system u Will Have s No Front-end saturation problem –Reset once per crossing –Also allows for data taking in abort gap (cannot do presently with AFE I) VERY useful for Calibration studies s Improved Ped dispersion and stability –Lower and tighter threshold setting capability Channel by Channel - analog s Improved reliability s Improved readout flexibility –Decreased deadtime –Multi-buffering possible CFT Readout may dominate L1 readout rate without multi-buffering s Added Functionality with new submission of TriP Chip - Tript –z information from timing (  2 ns rms)

27. TriP  The existing TriP ASIC (7000 die on hand)  Lots of testing done over last 2 years

28. AFE II –TriP Performance  Measurements on TriP very promising u Noise at 1/5 pe rms u Threshold setting at 1.5 pe reliably u Very high quality Analog Data  Plot at right was obtained after 1 day of work on a TriP modified AFE board u To get this good, a plot with the AFE took about 1 month of dedicated work by the same people! s BLACK – DATA s RED – FIT  All Discriminators Firing!

29. AFE II – TriP Discriminator Performance  Upper plot u Red – all data u Blue same data with threshold and discriminator fires u Black – fit  Lower plot u Ratio of analog data with and without discriminator fires (threshold set)  30% occupancy

30. TriP-t: the new idea  About 1% additional components:(time to amplitude converter)  7 bits t-info offline: 120ns full scale=> 2ns time => ~30cm resolution in Z

31. AFE II - TriPt  With a rather simple modification to the TriP design – time stamp for hits can be obtained  Current TriP  Electronics resolution was determined to be  400 ps u For 8 pe signal expect about 2 ns sigma  Z measurement –  30 cm  Has impact on reco time and cluster splitting  In Z   +15 min bias MC s 40-60% reduction in reco time s D0 Note 4497 u Improvement in clustering algorithm utilizing z info also a possibility 400 ps intrinsic resolution

32. TriP-t prep work  Bench testing  New package

33. TriP-t current status  The chip designers are chip designing.  Ready for submission 23 Aug ’04  The new chip is the “critical path” item for the project  Some prep work going on now u We will need new packaging u We had some concerns about features used on the new chip, but not used on the old (current!) TriP chip, so we are retesting some things.

34. AFE II - Cost and Schedule  Full Project Plan Now Available

35. AFEII Prototype - current status  Schematic design is 100% complete.  Internal review was held in early May.  Layout of the board is about 90% complete.  All parts are here.  Req’s for boards are in the system.  RFQs for stuffing are on the street.  Firmware about 75% complete.

36. AFE II – Cost and Schedule  Cost M&S: u Production cost M&S are based on quotes for parts and labor – contingency estimate is grounds up:  Manpower u Estimates from AFE experience  Schedule critical path is the Tript chip  Completion for the 05 Shutdown is not likely  Planning for adiabatic Installation u AFE I and AFEII mixed running u Will need to test compatibility once AFE II prototypes are ready (9/04) u Installation will have to be done at the crate level (16 boards) because of difference in power requirements for AFE I and AFE II  Credibility of installation plan is dependent on prototype tests u How quickly they come up u Platform test and integration with trigger u Software readiness u Physical Installation can occur quickly (8 hour)

37. AFE II Milestones  AFE II Prototype under test9/04  Tript MOSIS submission9/04  D0 Internal Review1/05  Director’s Review2/05  Tript production submission3/05  AFE II pre-Production7/05  AFE II production9/05  AFE II production complete12/05  First Board Ready for installation2/06

38. Conclusions – Improvements with AFE II  AFE II will u Improve noise floor and pedestal stability which will allow for consistent and reliable threshold setting with no discriminator feed-through or discriminator threshold shift s Will increase physics trigger efficiency s Potential for better hit efficiency and point resolution s Maintain capability of Preshower Detectors u No Front-End Saturation problem (reset once per crossing) u Added functionality of the Tript (z information) s Large reduction in reco time s Possible improvement in cluster finding –Cluster splitting leading to additional improvement in track quality u Readout architecture much more flexible s Less deadtime s Multiple buffers can be added to greatly increase L1 capability u Board construction is simpler, more robust s No MultiChip modules (MCM) s Mostly commercial parts/standard mounting techniques s Repairs/rework MUCH easier than in AFEI  AFEII will improve our capability to maintain high-quality and stable operation as the Tevatron Luminosity increases in RunII. This will allow D0 to maintain excellent tracking, trigger, and Preshower performance