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Monday, March 7 Homework #2 Homework #2 Solutions is posted Solutions is posted Homework #3 (in class) Homework #3 (in class) Solutions will be posted.

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Presentation on theme: "Monday, March 7 Homework #2 Homework #2 Solutions is posted Solutions is posted Homework #3 (in class) Homework #3 (in class) Solutions will be posted."— Presentation transcript:

1 Monday, March 7 Homework #2 Homework #2 Solutions is posted Solutions is posted Homework #3 (in class) Homework #3 (in class) Solutions will be posted tomorrow Solutions will be posted tomorrow Homework #4 is posted Homework #4 is posted Quiz 4 on Wednesday Quiz 4 on Wednesday Program #5 is due Friday Program #5 is due Friday Evaluation criteria are posted Evaluation criteria are posted If you haven’t used your late allowance, absolute deadline is midnight Sunday. If you haven’t used your late allowance, absolute deadline is midnight Sunday. Questions? Questions?

2 Today's topics MASM: advanced features MASM: advanced features

3 Ripple carry adder

4 “Growing” an ALU from gates Full-adder Full-adder 2s-complementer 2s-complementer Shifter Shifter Comparator Comparator

5 “Growing” an ALU from gates

6 “Growing” a CPU from gates ALURegisters Control Unit Clock Instruction pointer Instruction fetch, decode, execute Operand fetch, store Addressing unit

7 CPU Chips

8 Tying things together: the internal bus Control Unit, ALU, Registers, Addressing Unit communicate via a bus. Control Unit, ALU, Registers, Addressing Unit communicate via a bus. Speed depends on Speed depends on Bus width: number of bits that can transfer simultaneously Bus width: number of bits that can transfer simultaneously Bus length Bus length Synchronous vs asynchronous buses Synchronous vs asynchronous buses Synchronous means “tied to clock pulse” Synchronous means “tied to clock pulse” Bus arbitration Bus arbitration Multiple buses Multiple buses

9 “Growing” memory from gates Latches  chips Latches  chips RAM (Random Access Memory)‏ RAM (Random Access Memory)‏ SRAM (Static RAM)‏ SRAM (Static RAM)‏ DRAM (Dynamic RAM)‏ DRAM (Dynamic RAM)‏ SDRAM (Synchronous DRAM)‏ SDRAM (Synchronous DRAM)‏ ROM (Read-Only Memory)‏ ROM (Read-Only Memory)‏ PROM (Programmable ROM)‏ PROM (Programmable ROM)‏ EPROM (Erasable PROM)‏ EPROM (Erasable PROM)‏ EEPROM (Electrically EPROM)‏ EEPROM (Electrically EPROM)‏ Memory organization Memory organization Memory addressing Memory addressing

10 Memory Digital logic: Digital logic: Clocked SR latches (Set / Reset)‏ Clocked SR latches (Set / Reset)‏ Clocked D latches Clocked D latches D flip-flops D flip-flops Memory refresh Memory refresh Organization Organization matrix matrix

11 Memory types TypeCategoryErasable Byte alterable VolitileUseSRAMRead/writeElectricYesYesCache DRAMRead/writeElectricYesYes Main memory SDRAMRead/writeElectricYesYes ROMRead-onlyNoNoNoBoot PROMRead-onlyNoNoNoSpecialty EPROM Read- mostly UV light NoNoPrototyping EEPROM Read- mostly ElectricYesNoPrototyping FlashRead/writeElectricNoNo Digital film, etc.

12 (Optional) SRAM Feedback Inverters

13 (Optional) Latches (1)‏ (a) NOR latch in state 0. (b) NOR latch in state 1. (c) Truth table for NOR.

14 (Optional) Latches (2)‏ A clocked SR latch.

15 (Optional) Latches (3)‏ A clocked D latch.

16 (Optional)Flip-Flops Pulse generator

17 More features of MASM Low-level Low-level Bit shifting Bit shifting Real-address mode Real-address mode Interrupts and interrupt handlers Interrupts and interrupt handlers Higher-level Higher-level Data structures Data structures Conditional directives Conditional directives Multi-module programs Multi-module programs High-level language interface High-level language interface Win32 console mode Win32 console mode

18 Bit shifting Examples: Examples: moveax,10 shleax,4;multiply by 16 ;zero-fills on right moveax,10 shreax,2;integer divide by 4 ;zero-fill on left ;remainder is dropped Useful for base 2 arithmetic, bit mask shifting Useful for base 2 arithmetic, bit mask shifting

19 Real-address mode Permits access to all of memory (unlike Protected mode) Permits access to all of memory (unlike Protected mode) Required for interrupt processing Required for interrupt processing Addresses are 16-bit segment : 16-bit offset Addresses are 16-bit segment : 16-bit offset OK to use DWORD and extended (32-bit registers) OK to use DWORD and extended (32-bit registers) Setup required: Setup required: INCLUDEIrvine16.inc.data ;....code mainPROC movax,@data movds,ax

20 Real-address mode INCLUDEIrvine16.inc inserts the following directives INCLUDEIrvine16.inc inserts the following directives.MODELsmall,stdcall ;enables C-style parameters.STACK200h;doubles default stack size.386;enables extended registers exitEQU exitEQU

21 Interrupts, interrupt handling All modern operating systems are interrupt-driven All modern operating systems are interrupt-driven Interrupts may come from Interrupts may come from External ports/devices (hardware interrupts) External ports/devices (hardware interrupts) Mouse, keyboard, NIC, etc. Mouse, keyboard, NIC, etc. Program statements (software interrupts) Program statements (software interrupts) Read/write, etc. from/to files/devices Read/write, etc. from/to files/devices Operating system Operating system Exceptions, errors Exceptions, errors

22 Interrupts (in real-address mode) Interrupts are numbered (associated with an index in the interrupt vector) Interrupts are numbered (associated with an index in the interrupt vector) Interrupt vector is stored in static location (architecture-dependent) Interrupt vector is stored in static location (architecture-dependent) Interrupt causes OS to look up address of interrupt handler in the interrupt vector Interrupt causes OS to look up address of interrupt handler in the interrupt vector The CPU pushes all registers/flags, disables hardware interrupts, and calls the appropriate interrupt handler The CPU pushes all registers/flags, disables hardware interrupts, and calls the appropriate interrupt handler The interrupt handler executes until it hits IRET The interrupt handler executes until it hits IRET

23 Example MASM interrupts 10hvideo services 10hvideo services 1Ahtime of day 1Ahtime of day 21hmany I/O functions 21hmany I/O functions In general, “parameter” flags are set in the AH or AX register In general, “parameter” flags are set in the AH or AX register

24 Examples: Firing an interrupt movah,1;select “getChar” int21h;get keyboard character ; into AL. movax,716Ch;select “open file” movbx,0;read-only movcx,0;normal attribute movdx,1;file exists movsi,OFFSET fileName int21h

25 Real-mode programming Experiment! Experiment! Real-mode programming can be challenging and fun Real-mode programming can be challenging and fun Real-mode programming can cause bizarre problems Real-mode programming can cause bizarre problems

26 Questions? Do Homework #4


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