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Computer Architecture: A Constructive Approach Combinational ALU Arvind Computer Science & Artificial Intelligence Lab. Massachusetts Institute of Technology.

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Presentation on theme: "Computer Architecture: A Constructive Approach Combinational ALU Arvind Computer Science & Artificial Intelligence Lab. Massachusetts Institute of Technology."— Presentation transcript:

1 Computer Architecture: A Constructive Approach Combinational ALU Arvind Computer Science & Artificial Intelligence Lab. Massachusetts Institute of Technology January 9, 2012L1-1 http://csg.csail.mit.edu/SNU

2 Computing Devices Then… EDSAC, University of Cambridge, UK, 1949 January 9, 2012 L01-2 http://csg.csail.mit.edu/SNU

3 Computing Devices Now Dramatic progress in terms of size, speed, cost, reliability January 9, 2012 L01-3 http://csg.csail.mit.edu/SNU

4 How does a program execute on hardware A C program to add two arrays: The hardware must know, for example, How to add and compare two numbers Must have a place to keep the program and data Must know how to fetch instructions and data Must know how to sequence instructions:  Fetch a[i], Fetch b[i], add, store results in c[i], increment i, … January 9, 2012 L1-4http://csg.csail.mit.edu/SNU void vvadd( int n, int a[], int b[], int c[] ) { int i; for ( i = 0; i < n; i++ ) c[i] = a[i] + b[i]; } Computer Architecture is learning about how programs execute and designing hardware to execute them efficiently

5 Instruction Set Architecture (ISA) Computer architecture is the discipline of designing and implementing interfaces through which hardware and software interact This interface is often referred to as the Instruction Set Architecture (ISA) Examples: Intel’s IA-32, ARM, ARM-Thumb, PowerPC In this class we will use SMIPS, a subset of MIPS ISA Implementations are deeply affected by the technology issues; we will assume a simple and abstract model of technology based on Silicon January 9, 2012 L1-5http://csg.csail.mit.edu/SNU

6 Goal of the Intensive Course Learn a constructive approach to studying computer architecture Learn a new method of describing architectures where there is less emphasis on figures/diagrams and more emphasis on executable descriptions Each architecture and each part of it would be defined as executable code in Bluespec By this Friday you will have designed several different computers on which you will be able to execute your C programs January 9, 2012 L1-6http://csg.csail.mit.edu/SNU

7 In this lecture we will study how to implement simple arithmetic-logic operations we will first look at circuits for component functions such as Add, Shift and then put them together to form an Arithmetic-Logic Unit (ALU) January 9, 2012L1-7 http://csg.csail.mit.edu/SNU

8 Arithmetic-Logic Unit (ALU) Computers have many important interconnected parts or subsystems: Central Processing Unit Memory system including caches I/O systems ALU resides inside the CPU and carried out all the arithmetic and logical functions Op - Add, Sub,... - And, Or, Xor, Not,... - GT, LT, EQ, Zero,...  Result Comp? A B ALU January 9, 2012 L1-8http://csg.csail.mit.edu/SNU

9 Full Adder: A one-bit adder function fa(a, b, c_in); s = (a ^ b)^ c_in; c_out = (a & b) | (c_in & (a ^ b)); return {c_out,s}; endfunction Not quite correct – needs type annotations January 9, 2012 L1-9http://csg.csail.mit.edu/SNU

10 Full Adder: A one-bit adder corrected function Bit#(2) fa(Bit#(1) a, Bit#(1) b, Bit#(1) c_in); Bit#(1) s = (a ^ b)^ c_in; Bit#(1) c_out = (a & b) | (c_in & (a ^ b)); return {c_out,s}; endfunction Bit#(1) a declaration says that a is one bit wide {c_out,s} represents bit concatenation How big is {c_out,s} ? January 9, 2012 L1-10http://csg.csail.mit.edu/SNU

11 Types Every expression and variable in a Bluespec program has a type; sometimes it is specified explicitly and sometimes it is deduced by the compiler A type is a grouping of values: Integer: 1, 2, 3, … Bool: True, False Bit : 0,1 A pair of Integers: Tuple2#(Integer, Integer) A function fname from Integers to Integers: function Integer fname (Integer arg) Thus we say an expression has a type, belongs to a type January 9, 2012 L1-11http://csg.csail.mit.edu/SNU The type of each expression is unique

12 Type declaration versus deduction User writes down types of some expressions in a program and the compiler deduces the types of the rest of expressions If the type deduction cannot be performed or the type declarations are inconsistent then the compiler complains function Bit#(2) fa(Bit#(1) a, Bit#(1) b, Bit#(1) c_in); Bit#(1) s = (a ^ b)^ c_in; Bit#(2) c_out = (a & b) | (c_in & (a ^ b)); return {c_out,s}; endfunction type error January 9, 2012 L1-12http://csg.csail.mit.edu/SNU Type checking prevents lots of silly mistakes

13 2-bit Ripple-Carry Adder function Bit#(3) add(Bit#(2) x, Bit#(2) y, Bit#(1) c0); Bit#(2) s = 0; Bit#(3) c; c[0] = c0; let cs0 = fa(x[0], y[0], c[0]); c[1] = cs0[1]; s[0] = cs0[0]; let cs1 = fa(x[1], y[1], c[1]); c[2] = cs1[1]; s[1] = cs1[0]; return {c[2],s}; endfunction fa x[0] y[0] c[0] s[0] x[1] y[1] c[1] s[1] c[2] January 9, 2012 L1-13http://csg.csail.mit.edu/SNU

14 “let” syntax January 9, 2012 L1-14http://csg.csail.mit.edu/SNU The “let” syntax: avoids having to write down types explicitly let cs0 = fa(x[0], y[0], c[0]); Bits#(2) cs0 = fa(x[0], y[0], c[0]); The same

15 Parameterized types: # A type declaration itself can be parameterized – the parameters are indicated by using the syntax ‘#’ For example Bit#(n) represents n bits and can be instantiated by specifying a value of n Bit#(1), Bit#(32), Bit#(8), … January 9, 2012 L1-15http://csg.csail.mit.edu/SNU

16 An w-bit Ripple-Carry Adder function Bit#(w+1) addN(Bit#(w) x, Bit#(w) y, Bit#(1) c0); Bit#(w) s; Bit#(w+1) c; c[0] = c0; for(Integer i=0; i<w; i=i+1) begin let cs = fa(x[i],y[i],c[i]); c[i+1] = cs[1]; s[i] = cs[0]; end return {c[w],s}; endfunction Not quite correct January 9, 2012 L1-16http://csg.csail.mit.edu/SNU // concrete instances of addN! function Bit#(33) add32(Bit#(32) x, Bit#(32) y, Bit#(1) c0) = addN(x,y,c0); function Bit#(4) add3(Bit#(3) x, Bit#(3) y, Bit#(1) c0) = addN(x,y,c0);

17 valueOf(w) versus w Each expression has a type and a value and these come from two entirely disjoint worlds n in Bit#(n) resides in the types world Sometimes we need to use values from the types world into actual computation. The function valueOf allows us to do that Thus i<w is not type correct i<valueOf(w) is type correct January 9, 2012 L1-17http://csg.csail.mit.edu/SNU

18 Tadd#(w,1) versus w+1 Sometimes we need to perform operations in the types world that are very similar to the operations in the value world Examples: Add, Mul, Log We define a few special operators in the types space for such operations Examples: Tadd#(m,n), Tmul#(m,n), … January 9, 2012 L1-18http://csg.csail.mit.edu/SNU

19 A w-bit Ripple-Carry Adder corrected function Bit#(Tadd#(w,1)) addN(Bit#(w) x, Bit#(w) y, Bit#(1) c0); Bit#(w) s; Bit#(Tadd#(w,1)) c; c[0] = c0; let valw = valueOf(w); for(Integer i=0; i<valw; i=i+1) begin let cs = fa(x[i],y[i],c[i]); c[i+1] = cs[1]; s[i] = cs[0]; end return {c[valw],s}; endfunction January 9, 2012 L1-19http://csg.csail.mit.edu/SNU

20 Integer versus Int#(32) In mathematics integers are unbounded but in computer systems integers always have a fixed size Bluespec allows us to express both types of integers, though unbounded integers are used only as a programming convenience January 9, 2012 L1-20http://csg.csail.mit.edu/SNU for(Integer i=0; i<valw; i=i+1) begin let cs = fa(x[i],y[i],c[i]); c[i+1] = cs[1]; s[i] = cs[0]; end

21 Static Elaboration phase When Bluespec program are compiled, first type checking is done and then the compiler gets rid of many different constructs which have no direct hardware meaning, like Integers, loops cs0 = fa(x[0], y[0], c[0]); c[1]=cs0[1]; s[0]=cs0[0]; cs1 = fa(x[1], y[1], c[1]); c[2]=cs1[1]; s[1]=cs1[0]; … csw = fa(x[w-1], y[w-1], c[w-1]); c[w] = csw[1]; s[w-1] = csw[0]; January 9, 2012 L1-21http://csg.csail.mit.edu/SNU for(Integer i=0; i<valw; i=i+1) begin let cs = fa(x[i],y[i],c[i]); c[i+1] = cs[1]; s[i] = cs[0]; end

22 00 Logical right shift by 2 Fixed size shift operation is cheap in hardware – just wire the circuit appropriately Rotate, sign-extended shifts – all are equally easy January 9, 2012 L1-22http://csg.csail.mit.edu/SNU a b c d 0 0 a b

23 Conditional operation: shift versus no-shift We need a Mux to select the appropriate wires: if s is one the Mux will select the wires on the left otherwise it would select wires on the right s (s==0)?{a,b,c,d}:{0,0,a,b}; January 9, 2012 L1-23http://csg.csail.mit.edu/SNU 00

24 Gate-level implementation of a multiplexer January 9, 2012 L1-24http://csg.csail.mit.edu/SNU (s==0)?A:B case {s1,s0} matches 0: return A; 1: return B; 2: return C; 3: return D; endcase AND OR S A B S S0S0 S0S0 S1S1 A 2-way multiplexer A B C D A B A 4-way multiplexer

25 Logical right shift by n Shift n can be broken down in several steps of fixed-length shifts of 1, 2, 4, … Thus a shift of size 3 can be performed by first doing a shift of length 2 and then a shift of length 1 We need a Mux to select whether we need to shift at all The whole structure can be expressed an a bunch of nested conditional expressions You will write a Blusepec program to produce a variable size shifter in Lab 1 this afternoon January 9, 2012 L1-25http://csg.csail.mit.edu/SNU 00 0 s0 s1

26 Combinational ALU function Bit#(width) combALU(Bit#(width) a, Bit#(width) b, OP op); case op matches NOT: return ~a; AND: return a&b; OR: return a|b; SHL: return a<<b; SHR: return a>>b; ADD: return addN(a,b); SUB: return a-b; MUL: return combMulN(a,b); endcase endfunction Once we have implemented the primitive operations like addN, >>, the ALU can be implemented simply by introducing a Mux controlled by op to select the appropriate circuit January 9, 2012 L1-26http://csg.csail.mit.edu/SNU Other operations may be needed slightly stylized code

27 Conditional operations Generate one-bit result which is used for branching Eq (a,b) : (a == b); Neq(a,b) : (a != b); Le(a) : signedLE(a, 0); Lt(a) : signedLT(a, 0); Ge(a) : signedGE(a, 0); Gt(a) : signedGT(a, 0); Straightforward to implement; can be combined with the ALU with an extra bit of output January 9, 2012 L1-27http://csg.csail.mit.edu/SNU

28 ALU with Conditionals mux add comb MulN a b op January 9, 2012 L1-28http://csg.csail.mit.edu/SNU … Next - Sequential Circuits mux 0 EQ


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