1. 1 Copyright 1998 Morgan Kaufmann Publishers, Inc. All rights reserved. MIPS Assembly language In computer programs we have : Data Instructions (Arithmetic & control) We need a memory & a CPU:

2. 2 Copyright 1998 Morgan Kaufmann Publishers, Inc. All rights reserved. What should the CPU do? We need to transfer data from registers to the memory and vice versa We need to perform arithmetic operations on the data residing in registers We need to have the ability of controlling the flow of the program (Ifs and Jumps)

3. 3 Copyright 1998 Morgan Kaufmann Publishers, Inc. All rights reserved. The machine understands only bits!

4. 4 Copyright 1998 Morgan Kaufmann Publishers, Inc. All rights reserved. Humans prefer a language “closer” to English

5. 5 Copyright 1998 Morgan Kaufmann Publishers, Inc. All rights reserved. Labels will improve the situation

6. 6 Copyright 1998 Morgan Kaufmann Publishers, Inc. All rights reserved. High-level language is even better

7. 7 Copyright 1998 Morgan Kaufmann Publishers, Inc. All rights reserved. The process of Compilation

8. 8 Copyright 1998 Morgan Kaufmann Publishers, Inc. All rights reserved. Preface We’ll learn: How a computer is built Some performance analysis Advanced subject (Pipeline, caches) that are used in all modern computers The course book: Computer Organization & Design The hardware/software interface, David A. Patterson and John L. Hennessey. Second Edition 1998

9. 9 Copyright 1998 Morgan Kaufmann Publishers, Inc. All rights reserved. Machine language, Assembly and C The CPU understands machine Language only Assembly language is easier to understand: - Abstraction - A unique translation C language (a high level language): - The translation is not unique ! - It depends on the Compiler and the optimization requested - It is portable (fits every CPU) When do we use Assembly? C is closer to regular English.( The high level language can be adjusted to the desired processing). High productivity: In a single sentence we define many machine operations. And the most important: It does not depend on the CPU !!! Looks like regular English. Depends on the specific CPU. Every CPU has a different set of Assembly instructions since it has different sets of registers and machine operations. Nowadays we use Assembly only when we have to: * When processing time is critical and we need “manually” adjustments of the code * When all resources of the CPU (e.g., Overflow, Index registers etc.) are needed, but not supported by the hig level language * When memory is critical an an optimization of its management is required (e.g., in DSPs)

10. 10 Copyright 1998 Morgan Kaufmann Publishers, Inc. All rights reserved. Instruction Set Architecture There is similarity between Assembly languages of different CPUs We’ll learn the MIPS Assembly language. It was developed in the 80’s and was used in workstation such as Silicon Graphics, NEC, Sony. RISC v. CISC –Reduced Instruction Set Computer - MIPS –8086 - Complex Instruction Set Computer Our motto is: “More is less” By that we mean that a smaller set of simpler instructions results with a better performance. This is so, since the h/w required is simpler, it is therefore faster and takes less Silicon space, which means less expensive.

11. 11 Copyright 1998 Morgan Kaufmann Publishers, Inc. All rights reserved. 1st design rule: Simplicity favors Regularity Arithmetic operations: MIPS addi a,b,100 # a=b+100 add a,b,c # a=b+c 8086 ADD EAX,B # EAX= EAX+B We prefer a simple mechanism with minimalistic instructions such as: R3 = R1 op R2 on a CPU which might be easier to program since it has instructions like: R5 = ( R1 op1 R2) op2 (R3 op3 R4 ) but is much harder to design and implement

12. 12 Copyright 1998 Morgan Kaufmann Publishers, Inc. All rights reserved. 2nd design rule: Smaller is faster Arithmetic operations are allowed only on registers The operands could be registers or a single constant There are only 32 registers ( spilling is applied when needed) A register contains a word = 32 bits = 4 bytes We use conventions $1,$2 … $s0,$s1... - C variables $t1,$t2 … - temporary vars. An example: f=(g+h)-(k+j) #$s0=f, $s1=g, $s2=h, $s3=k, $s4=j add $t0,$s1,$s2 add $t1,$s3,$s4 sub $s0, $t0, $t1 The rgisters are denoted $0 - $31 or by names related to their job. There is a convention of their jobs. The example describes how the sentence: f=(g+h)- (k+j) is translated into Assembly language instructions. The registers are the heart of the CPU. Accessing registers is faster than accessing the memory. We access 3 registers simultaneously: read from two and write to the 3rd. Page 110 Page 115

13. 13 Copyright 1998 Morgan Kaufmann Publishers, Inc. All rights reserved. Policy of Use Conventions Other registers are: $at = $1 which is reserved for the Assembler and $k0, $k1 = $26, $27 which are reserved for the Operating System

14. 14 Copyright 1998 Morgan Kaufmann Publishers, Inc. All rights reserved. The memory The memory is a long array The address is the index to the array Byte addressing - The index is in bytes The maximal size of memory available is 2 30 words = 2 32 bytes 0 1 2 3 4 5 6... 8 bits of data

15. 15 Copyright 1998 Morgan Kaufmann Publishers, Inc. All rights reserved. Accessing the memory Load and Store instructions only in LW we load a word, but the address we access is given in bytes lw $s1,100($s2) # $s1=Memory[$s2+100] sw $s1,100($s2) # Memory[$s2+100]=$s1 offset = the location in the array base register = pointer to the array Page 112

16. 16 Copyright 1998 Morgan Kaufmann Publishers, Inc. All rights reserved. Accessing bytes There are also lb (load byte) and sb (store byte) instructions These are useful for handling “char”s since ASCII characters are stored in bytes ASCII: American Standard Code For information Interchange Another code, Unicode, store characters in two bytes each

17. 17 Copyright 1998 Morgan Kaufmann Publishers, Inc. All rights reserved. ASCII

18. 18 Copyright 1998 Morgan Kaufmann Publishers, Inc. All rights reserved. Accessing memory An example: A is an array of words The address of A is in $3 h is in $2 C code: A[2] = h + A[2]; MIPS code: lw $t0, 8($s3) # $t0=$s3[8] add $t0, $s2,$t0 # $t0=$s2+$t0 sw $t0, 8($s3) # $s3[8]=$t0 0 4 8 12 16 32 bits of data A Page 114 A[0] A[1] INTEL = Little endian A[2] MIPS = Big endian 013 0123 2

19. 19 Copyright 1998 Morgan Kaufmann Publishers, Inc. All rights reserved. All instructions have the same size, 32 bits In Intel’s 8086 the size changes from 1 to 17 bytes An R-type instruction: add $s1,$s2,$s3 # $s1=$17,$s2=$18, $s3=$19 Format of R-type instruction: 0 18 19 17 0 32 31 0 000000 10010100111000100000100000 op rs rt rdshamtfunct op - opecoders - register source rt- register source no 2rd - register destination funct - function shamt - shift amount Machine language 655556655556 20H11H13H12H0H

20. 20 Copyright 1998 Morgan Kaufmann Publishers, Inc. All rights reserved. Minimize the types. Use similar instructions. Example: lw $s1, 32($s2) # $s1 =$17, $s2=18 35 18 17 32 op rs rt 16 bit number 3rd design rule: A good design requires some compromises op rs rt rdshamtfunct op rs rt 16 bit address op 26 bit address RIJRIJ 655556655556 6 5 5 5 5 6 The compromise here is using different dormats to different types of instructions. We could have increased the number of bits per instruction so we have enough bits for all fields of all types of instructions. However, many of them would have been unused most of the time. So we use 3 types. (A different size conflicts with simplicuty).

21. 21 Copyright 1998 Morgan Kaufmann Publishers, Inc. All rights reserved. The program (code) is stored in memory just like data Performing the program The Program Counter (PC) - a special register keeping the address of the next instruction We read the code word from the memory (using the PC as the pointer) We then increment the PC ProcessorMemory memory for data, programs, compilers, editors, etc. The program in memory

22. 22 Copyright 1998 Morgan Kaufmann Publishers, Inc. All rights reserved. Jump - is an absolute jump without any conditions j label Branch - a relative conditioned jump bne $1,$2,label# $1!=$2 go to label An example: if (i!=j) beq $s4, $s5, Lab1 h=i+j;add $s3, $s4, $s5 else j Lab2 h=i-j;Lab1:sub $s3, $s4, $s5 Lab2:... Branch vs Jump ($s3=h $s4 =i $s5=j )

23. 23 Copyright 1998 Morgan Kaufmann Publishers, Inc. All rights reserved. Instructions: bne $t4,$t5,Label Next instruction is at Label if $t4!= $t5 beq $t4,$t5,Label Next instruction is at Label if $t4 = $t5 j Label Next instruction is at Label Formats: we see that branch - is a relative jump in a range of 2^16 words We assume that most of the jumps are local = branches Beq $s1,$s2,25 # if ($s1 ==$s2) go to PC +4 +25*4 op rs rt 16 bit address op 26 bit address IJIJ Addresses in Branches and Jumps

24. 24 Copyright 1998 Morgan Kaufmann Publishers, Inc. All rights reserved. Actual coding example

25. 25 Copyright 1998 Morgan Kaufmann Publishers, Inc. All rights reserved. An important rule: In MIPS Assembly instructions we write code addresses in words data addresses in bytes when a MIPS CPU accesses memory it always gives the address in bytes We cannot do: bne $8,$21,far_adrs since there are only 16 bits of offset in branch instructions. But we can do: beq $8,$21,nxt j far_adrs nxt: About long jumps: This is a service given by the Assembler

26. 26 Copyright 1998 Morgan Kaufmann Publishers, Inc. All rights reserved. slt $t0, $s1, $s2 means if $s1 < $s2 then $t0 = 1 else $t0 = 0 We can use slt to “build” a blt instruction blt $s0,$s1,Less slt $at,$s0,$s1 # $t0 gets 1 if $s0<$s1 bne $at,$zero,Less # go to Less if $t0 != 0 blt is a psedoinstruction Assembler uses $at (= $1) for pseudoinstructions How do we code a Branch-if-less-than? Also: move $t1,$s4 stands for: add $t1,$s4,$zero

27. 27 Copyright 1998 Morgan Kaufmann Publishers, Inc. All rights reserved. Design rule 4: Build the common case faster Most arithmetic operation use small constants Large constants addi $29, $29, 4 1010101010101010 00000000000000001010101010101010 0000000000000000 lui $t0,1010101010101010 ori $t0,$t0,1010101010101010 So we have many instructions with 16 bit constants: addi, slti, andi, ori, xori These will be take longer to load, but only one more instruction is added

28. 28 Copyright 1998 Morgan Kaufmann Publishers, Inc. All rights reserved. MIPS Assembly language summary

29. 29 Copyright 1998 Morgan Kaufmann Publishers, Inc. All rights reserved. RISC v. CISC I - number of instructions in program T - time of the clock cycle CPI - number of clock cycles per instruction RISC: I T CPI CISC: I T CPI

30. 30 Copyright 1998 Morgan Kaufmann Publishers, Inc. All rights reserved. An exercise A C code and two MIPS Assembly translations are given below: while (save[i]!=k) do i=i+j ; save:array [ 0..100] of word k is kept in $21. $19 has i and $20 has j. First translation: Loop: muli $9,$19,4 # Temporary reg $9:=i*4 lw $8,save($9) # Temporary reg $8:=save[i] bne $8,$21,Exit # Goto Exit if save[i]<>k add $19,$19,$20 # i:=i+j j Loop # Goto Loop Exit:

31. 31 Copyright 1998 Morgan Kaufmann Publishers, Inc. All rights reserved. exercise (cont.) 2nd translation muli $9,$19,4# Temporary reg $9:=i*4 lw $8,save($9)# Temporary reg $8:=save[i] bne $8,$21,Exit# Goto Exit if save[i]<>k Loop: add $19,$19,$20# i:=i+j muli $9,$19,4# Temporary reg $9:=i*4 lw $8,save($9)# Temporary reg $8:=save[i] beq $8,$21,Loop# Goto Loop if save[i]=k Exit: Assuming the loop is performed 10 times, what is the number of instructions performed in the two translations?

32. 32 Copyright 1998 Morgan Kaufmann Publishers, Inc. All rights reserved. Compiler (Assembler) and Linker A.asm B.asm compiler A.obj B.obj linker C.lib (c.obj) P.exe loader Memory Page 161

33. 33 Copyright 1998 Morgan Kaufmann Publishers, Inc. All rights reserved. Linker operation B.asm compiler A.obj B.obj s:.word 3,4 j k lw $1,s ($2) k: add $1,$2,$3 m:.word 2 sw 7, m($3) A.asm 3 4 j 2 lw $1,0($2) add $1,$2,$3 2 sw 7,0($3) 2 3 4 sw 7,0($3) j 3 lw $1,4($2) add $1,$2,$3 linker P.exe Pages 156-160

34. 34 Copyright 1998 Morgan Kaufmann Publishers, Inc. All rights reserved. The structure of an object file Object file header text segment data segment relocation information symbol table debugging information Page 161