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First time common synthesis and simulation of ECL and CMOS parts at a BiCMOS chip based on the IHP SGB25V Library Frank Winkler, Humboldt University of.

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Presentation on theme: "First time common synthesis and simulation of ECL and CMOS parts at a BiCMOS chip based on the IHP SGB25V Library Frank Winkler, Humboldt University of."— Presentation transcript:

1 First time common synthesis and simulation of ECL and CMOS parts at a BiCMOS chip based on the IHP SGB25V Library Frank Winkler, Humboldt University of Berlin Heinz-Volker Heyer, Kayser-Threde GmbH Frank Herzel, Innovation High Performance (IHP) GmbH Bénédicte-Marie Folio, Boris Glass, Christine Miquel, European Space Agency (ESA/ESTEC) AMICSA 2008, Portugal 1

2 Outline Introduction ECL Synthesis BiCMOS local oscillator (LO) Digital mixed mode simulation Results Conclusion AMICSA 2008, Portugal 2 Common synthesis and simulation of ECL and CMOS parts at a BiCMOS chip based on the IHP SGB25V Library Outline · Introduction · Local Oscillator · ECL Synthesis · Mixed Mode Simulation · Results · Conclusions

3 Introduction - Local Oscillators are fundamental building blocks in any wireless system - One of the most challenging RF components to integrate on-chip is a high quality frequency synthesizer - multi-standard systems further increases the complexity - Wireless standards are usually planned around specific crystal or reference frequencies - Challenge: on-chip Local Oscillator (LO) to achieve the channel spacing required for any other standard - LO for frequencies about 10 GHz needs both analog and digital CMOS and ECL parts. - Problem: a long time analog simulation of those chips is not applicable! AMICSA 2008, Portugal 3 Common synthesis and simulation of ECL and CMOS parts at a BiCMOS chip based on the IHP SGB25V Library Outline · Introduction · Local Oscillator · ECL Synthesis · Mixed Mode Simulation · Results · Conclusions

4 Local Oscillator LO - 8.5 … 11.5 GHz Local Oscillator (LO) - 100 MHz reference frequency - SPI programmable - IHP SGB25 0.25 µm technology - CMOS parts - ECL parts - BiCMOS analog parts - on-chip solution AMICSA 2008, Portugal 4 Common synthesis and simulation of ECL and CMOS parts at a BiCMOS chip based on the IHP SGB25V Library Outline · Introduction · Local Oscillator · ECL Synthesis · Mixed Mode Simulation · Results · Conclusions

5 Local Oscillator overview AMICSA 2008, Portugal 5 Common synthesis and simulation of ECL and CMOS parts at a BiCMOS chip based on the IHP SGB25V Library Outline · Introduction · Local Oscillator · ECL Synthesis · Mixed Mode Simulation · Results · Conclusions

6 Local Oscillator test: CMOS, ECL, BiCMOS parts AMICSA 2008, Portugal 6 Common synthesis and simulation of ECL and CMOS parts at a BiCMOS chip based on the IHP SGB25V Library Outline · Introduction · Local Oscillator · ECL Synthesis · Mixed Mode Simulation · Results · Conclusions

7 Local Oscillator layout - different designs parts: analog, digital - challenge: common ECL/CMOS/IO digital cell simulation AMICSA 2008, Portugal 7 Common synthesis and simulation of ECL and CMOS parts at a BiCMOS chip based on the IHP SGB25V Library Outline · Introduction · Local Oscillator · ECL Synthesis · Mixed Mode Simulation · Results · Conclusions Analog partsCMOS part ECL partsCMOS I/O cells

8 ECL Synthesis - ECL (emitter couped logic) allows 3 to 10 times higher frequencies than CMOS using the same technology - There is a new ECL SGB25 library available at IHP - It supports full-differential signalling - But: synthesis tools (like Synopsys ®) does not support the differential signalling of the new library - New solution: 2 step ECL synthesis: - Step 1: single ended signalling synthesis - Step 2: converting to a differential design - Benefits: Using ECL-to-CMOS and CMOS-to-ECL converters, ECL single ended signalling is compatible to CMOS signalling. This allows a mixed mode ECL/CMOS digital simulation. AMICSA 2008, Portugal 8 Common synthesis and simulation of ECL and CMOS parts at a BiCMOS chip based on the IHP SGB25V Library Outline · Introduction · Local Oscillator · ECL Synthesis · Mixed Mode Simulation · Results · Conclusions

9 ECL Synthesis VHDL Code (fragment)  ECL single ended netlist AMICSA 2008, Portugal 9 Common synthesis and simulation of ECL and CMOS parts at a BiCMOS chip based on the IHP SGB25V Library Outline · Introduction · Local Oscillator · ECL Synthesis · Mixed Mode Simulation · Results · Conclusions Stage0: process(Clk, Init) begin if Init = '1' then Count(0) <= '0'; elsif Clk'event and Clk = '1' then if (Clk_fb = '0' and Div_ctrl = '1') then Count(0) <= '0'; -- divide by 5 else Count(0) <= '1'; -- divide by 4: end if; end process; Example 1: the dual modulus 4/5 divider of the LO

10 ECL Synthesis AMICSA 2008, Portugal 10 Common synthesis and simulation of ECL and CMOS parts at a BiCMOS chip based on the IHP SGB25V Library Outline · Introduction · Local Oscillator · ECL Synthesis · Mixed Mode Simulation · Results · Conclusions Example 2: The programmable ECL divider of the LO 166.800 µm², 312 mW, 88 cells,

11 Mixed Mode Simulation AMICSA 2008, Portugal 11 Common synthesis and simulation of ECL and CMOS parts at a BiCMOS chip based on the IHP SGB25V Library Outline · Introduction · Local Oscillator · ECL Synthesis · Mixed Mode Simulation · Results · Conclusions SPI initialized Clk_fb_out changing (65 to 130 MHz) ECL signalsVCO Clock CMOS signals

12 Results AMICSA 2008, Portugal 12 Common synthesis and simulation of ECL and CMOS parts at a BiCMOS chip based on the IHP SGB25V Library Outline · Introduction · Local Oscillator · ECL Synthesis · Mixed Mode Simulation · Results · Conclusions (* marks detected flipflop setup/hold time violations) 1 ms simulation @ 6 (12) GHz = 6 024 096 385 clock observations Improvement suggestion after simulation: Design works after adding of a clock buffer up to 14 GHz

13 Results AMICSA 2008, Portugal 13 Common synthesis and simulation of ECL and CMOS parts at a BiCMOS chip based on the IHP SGB25V Library Outline · Introduction · Local Oscillator · ECL Synthesis · Mixed Mode Simulation · Results · Conclusions Statistical frequency analysis of the LO output signal (271423 single periods during 1 ms simulation time)

14 Results AMICSA 2008, Portugal 14 Common synthesis and simulation of ECL and CMOS parts at a BiCMOS chip based on the IHP SGB25V Library Outline · Introduction · Local Oscillator · ECL Synthesis · Mixed Mode Simulation · Results · Conclusions ECL layout (Thanks to IMST GmbH Germany)

15 Conclusions - A new on-chip mixed mode local oscillator up to 12 GHz - BiCMOS analog parts - First full HDL synthesized ECL Parts - First common ECL/CMOS simulation AMICSA 2008, Portugal 15 Common synthesis and simulation of ECL and CMOS parts at a BiCMOS chip based on the IHP SGB25V Library Outline · Introduction · Local Oscillator · ECL Synthesis · Mixed Mode Simulation · Results · Conclusions

16 Thank you! AMICSA 2008, Portugal 16 Common synthesis and simulation of ECL and CMOS parts at a BiCMOS chip based on the IHP SGB25V Library Outline · Introduction · Local Oscillator · ECL Synthesis · Mixed Mode Simulation · Results · Conclusions

17 Humboldt-Universität zu Berlin Institut für Informatik Dr.-Ing. Frank Winkler, fwinkler@informatik.hu-berlin.de AMICSA 2008, Portugal - Common synthesis and simulation of ECL and CMOS parts at a BiCMOS chip based on the IHP SGB25V Library Outline · Introduction · Local Oscillator · ECL Synthesis · Mixed Mode Simulation · Results · Conclusions Kayser Threde GmbH München Dipl.-Ing. Heinz-Volker Heyer heinz-volker.heyer@kayser-threde.com

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