1. Huffman Encoder Activity Report 2 Advisor:Dr.Goudarzi Advanced topics in design hardware January 2006

2. What is the aim? Implement an embedded system both in hardware and software (Codesign) Tools to be used : EDK as a platform to evolve a complete system in hardware and software simoultaineusly Hardware language:VHDL,Verilog Software language:C Simulation:Modelsim

3. Project phases: Think up your system in top level Hardware/Soft ware partitioning Choosing an optimal algorithm Using EDK Behavorial simulation using Modelsim

4. Algorithm Almost 15 source codes for Huffman algorithm were investigated but most of them weren’t optimized for hardware implementation Writing the code from scratch was our final decision Using a simple static huffman instead of the dynamic one

5. Data Compression Classification: Lossy vs Lossless Fixed vs Variable Length Huffman encoding: A Brief Overview

6. Lossy vs Lossless: Lossy CS & Q MPEG JPEG Lossless Huffman LZW Delta

7. Fixed vs Variable: MethodInputOutput CS & Qfixed HuffmanFixedvariable Arithmeticvariable LZWvariablefixed

8. Binary trees* can be used in an interesting way to construct minimal length encodings for messages when the frequency of letters used in the messages is known. A special kind of binary tree, called a Huffman coding tree is used to accomplish this. *Binary tree is a tree that each node has 2 children

9. To build the Huffman tree : 1.sort the frequencies into increasing order. 2.choose the two smallest values. 3.construct a binary tree with labeled edges. 4. replace the two smallest values with their sum. 5. getting a new sequence 6. again take the two smallest values and construct a labeled binary tree. 7.Go to step 2 until remain no letter. 8.Finish!

10. E29 I5 N7 P12 S4 T8 Example : letters Frequency Smallest value 4+5=9 new sequence:(7, 8, 9, 12, 29). (N,T,IS, P, E) Smallest value

11. (9, 12,15, 29) (IS, P,NT, E) Smallest value (15, 21, 29) (NT,ISP,E) Smallest value

12. (29, 36 ) (E,INPST) Last Combination

13. (36,29) E1 I0110 P010 N000 S0111 T001 Result !

14. SENT 0111 1 000 001 PREFIX coding As soon as a 1 is read, you know it is an E. 0110 is an I. you do not need to see any more bits. When a 01 is seen, it is either I or P or S, etc. NOTE:it does not make any difference which one is placed as the left subtree and which in the right subtree.

15. We had 6 letters so we need 3 bitsfor each letter in normal coding. If the entire message is 65 characters long so 3*65=195 bits to code it but if we use “Huffman” the message require: 1*29+4*5+3*12+3*7+4*4+3*8=146 bits. We save 100-(146/195)*100=25% of our memory!

16. Project phases: Hardware/Soft ware partitioning Decide which parts to implement in software and what parts in hardware Think up your system in top level Using EDK Behavorial simulation using ModelSim

17. Hardware/software partitioning: Design includes a powerpc core The Encoder is attached to the on-chip peripheral Bus(OPB) Data stored in two RAMs attached to the OPB PPC RAM1RAM2 Huff Enc OPB PLB BRAM

18. Hardware/software partitioning: Hardware: Create the binary code Add character to the tree Update the tree Software: Reset the hardware Read character from RAM1 Send character to hardware Read binary code from hardware Write compressed binary code to RAM2

19. Project phases: Using EDK Hardware/Soft ware partitioning Think up your system in top level Behavorial simulation using ModelSim

20. Embedded Processor Design: Hardware components (e.g. IO devices,timers,…) Memory Map Software Applications (hardware drivers,ISR,…)

21. Embedded Development Tool Flow Overview Data2MEM Bitstream Compiler/Linker (Simulator) C Code Debugger Standard Embedded SW Development Flow CPU code in on-chip memory ? CPU code in off-chip memory Download to Board & FPGA Object Code Standard FPGA HW Development Flow Synthesizer Place & Route Simulator VHDL/Verilog ? Download to FPGA

22. PPC: PowerPC 405 Core Dedicated Hard IP Flexible Soft IP RocketIO DCR Bus UART GPIO On-Chip Peripheral Hi-Speed Peripheral GB E-Net e.g. Memory Controller Arbiter On-Chip Peripheral Bus OPB Arbiter Processor Local Bus InstructionData PLB DSOCM BRAM ISOCM BRAM Bus Bridge IBM CoreConnect™ on-chip bus standard PLB, OPB, and DCR

23. PPC Memory Map: 0x0000_0000 0xFFFF_0000 0xFFFF_FFFC Peripherals PLB/OPB Memory Reset Address

24. PPC Core:

25. Thanks for your attention Maryam.Moghaddas Arezoo.Erfanifard We are at the beginning The project is underway and going on…