1. Types of Pentium Processors Pentium Pentium MMX Pentium Pro Pentium II

2. Standard Pentium Parts BIU Bus Interface Unit 8K Code Cache 8K Data Cache Instruction Prefetch Buffer & Decode Unit ALU Registers Floating Point Unit Branch Predictor Unit To RAM

3. Pentium MMX Technology Designed for better multimedia abilities. Bigger caches for more readily available code & data TLB’s for faster addressing MMX unit for multimedia functions.

4. Pentium MMX BIU Bus Interface Unit Instruction Prefetch Buffer & Decode Unit ALU Registers Floating Point Unit Branch Predictor Unit To RAM 8K Code Cache 8K Data Cache 16K Data Cache 16K Code Cache The caches are bigger, each with a Translation Lookaside Buffer (TLB) which convert the address codes used by the caches to a kind that the processor can use.

5. BIU Bus Interface Unit 8K Code Cache 8K Data Cache Instruction Prefetch Buffer & Decode Unit ALU Registers Branch Predictor Unit To RAM Pentium MMX unit Floating Point Unit MMX The MMX unit does 57 functions for multimedia. It uses some of the registers in the FPU, which are bigger than the ones in the ALU’s. This allows the MMX unit to function faster than the main processor.

6. The Pentium Pro Processor Designed to minimize downtime of the processor, thereby speeding up the CPU. Adds a Level 2 Cache. Adds a BTB. Adds a ROB.

7. ROB The Pentium Pro Level 2 Cache BIU 8K L1 I-Cache 8K L1 D-Cache IPB & Decode Unit ALU FPU Branch Target Buffer L2 Cache JEU D/E RU SB The L2 Cache is another way to have data immediately available for the processor.

8. ROB The Pentium Pro ROB BIU 8K L1 I-Cache 8K L1 D-Cache IPB & Decode Unit ALU FPU Branch Target Buffer L2 Cache JEU D/E RU SB The ROB is like a pool for processing.

9. Pentium II Processor Combines the MMX technology with the Pro setup. The L2 Cache, however, is not integrated into the CPU in the same way.

10. ROB The Pentium II L2 Cache BIU 16K L1 I-Cache 16K L1 D-Cache IPB & Decode Unit ALU MMX Branch Target Buffer L2 Cache JEU D/E RU SB The L2 relocation is cheaper to make, but creates a slower connection to the processor. FPU

11. ROB The Pentium II L1 Caches BIU 16K L1 I-Cache 16K L1 D-Cache IPB & Decode Unit ALU MMX Branch Target Buffer L2 Cache JEU D/E RU SB This is compensated for by increasing the L1 caches to 16K. FPU

12. ROB The Pentium II MMX module BIU 16K L1 I-Cache 16K L1 D-Cache IPB & Decode Unit ALU MMX Branch Target Buffer L2 Cache JEU D/E RU SB The Pentium II also has the MMX module near the FPU. FPU