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Logic and Computer Design Simon Petruc-Naum CS 147 – Dr. S.M. Lee.

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Presentation on theme: "Logic and Computer Design Simon Petruc-Naum CS 147 – Dr. S.M. Lee."— Presentation transcript:

1 Logic and Computer Design Simon Petruc-Naum CS 147 – Dr. S.M. Lee

2 Combinational Logic What is it? What is it used for? How is it Implemented? Logical Gates

3 What is Combinational Logic? Computers make decisions based on a combination of inputs. A combinational Logic Unit takes Boolean data as input and produces Boolean data as output.

4 Uses for Combinational Logic Combinational Logic Units can be used to perform many functions Consider the binary adder function

5 Binary Adder Single Digit adder

6 How does it work? Boolean functions are created by combining logical gates. Examples of logical gates are NOT, AND, OR, NAND, NOR, XOR…

7 In reality Logical gates are mathematical abstractions. I reality they are implemented using Transistor-Transistor Logic (TTL), or Complementary Metal Oxide Semiconductors (CMOS).

8 TTL for NAND gate If both A and B have a voltage than current will flow to GND otherwise it will flow to Q.

9 NMOS Implementation of NAND Similar to CMOS, NMOS uses only N-type transistors. Again we can see that if either A or B has voltage, F will have a current

10 Positive vs. Negative Logic Assigning a logical 1 to a voltage is positive Logic Assigning a logical 1 to a lack of voltage is negative logic ABF 000 010 100 111 ABF 111 101 011 000 Positive Logic AND gate Negative Logic OR gate

11 Combining Logical Gates Sum of Product form (SOP) F=A’B’C+A’BC’+AB’C’+A’B’C’ Each product term is a minterm because it contains one of each variable. Each minterm has a value of 1 for exactly 1 row in the truth table (and 0 for the others)

12 Combining Logical Gates Product of Sum form (POS) F=(A’+B’+C)(A’+B+C’)(A+B’+C’)(A’+B’+C’) Each sum term is a maxterm because it contains one of each variable. Each maxterm has a value of 0 for exactly 1 row in the truth table (and 1 for the others)

13 Metrics for Combinational Logic Gate Count: number of logic gates in the logical unit. Gate Input Count: total number of inputs of the combined gates. Circuit Depth: Maximum number of gates along a path from inputs to outputs. (e.g. 2 for as POS and SOP)

14 Reduction of Combinational Logic Reducing the complexity of combinational logic can save cost, and improve performance.

15 Implicants A product term is an implicant of a Boolean function if the function takes the value of 1 whenever the product term equals 1. A prime implicant is an implicant that cannot have any fewer literals. (i.e. cannot be reduced) Essential prime implicants cover the output of a function that no other prime implicant can cover.

16 Reducing Boolean Expressions Determine all prime implicants. Select all essential prime implicants. For non-essential prime implicants, select those that include all remaining minterms with the least amount of overlap withother prime implicants.

17 Using the Karnaugh Map Prime implicants are rectancular groupings of adjacent minterms. (there must be 2-to-the-n minterms in each grouping). Make the biggest possible groups to reduce the number of literals in each term. Avoid overlaps to reduce the total number of terms.

18 Analog for Product of Sums Implicants are sum terms that have a value of 0 whenever the function has a value of 0. On the K-map, we place 0’s for the maxterms. We group the 0’s into essential and non- essential prime implicants just as we did with the SOP K-map. F=AB’C+A’BC’=(A+B’+C)(A’+B+C’)

19 Homogeneity of Logical Gates NAND and NOR can be combined to form any Boolean function. (they are universal) Using all NAND or all NOR gates can simplify the production process for integrated circuits, and reduce costs. Converting a logical expression to all NAND or NOR gates can however, increase circuit depth.

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