Presentation on theme: "Canonical Forms and Logic Miniminization"— Presentation transcript:
1 Canonical Forms and Logic Miniminization Today:First Hour: Canonical FormsSection of Katz’s TextbookIn-class Activity #1Second Hour: Incomplete Functions, Introduction to Logic MinimizationSection and of Katz’s TextbookIn-class Activity #2
2 Canonical Forms Truth tables uniquely define Boolean functions There are two standard (canonical) forms for Boolean expressions that derived from the truth tableRepresent the function’s 1s (on-set) called Sum of Products (SOP) formRepresent the function’s 0s (off-set) called Product of Sums (POS) form
3 SOP Expressions Sample truth table A B C FF1F = A' B C + A B' C' + A B' C + A B C' + A B CF' = A' B' C' + A' B' C + A' B C'
4 Notion of a mintermA minterm is 1 for exactly 1 row of the truth tableA minterm is a product (AND) of all the literals for that rowA truth table function can be represented in terms of its 1sA truth table function can be represented by summing (ORing) its minterms
5 Shorthand notation for minterms of 3 variables # A B C mintermsA' B' C' = m0A' B' C = m1A' B C' = m2A' B C = m3A B' C' = m4A B' C = m5A B C' = m6A B C = m7Shorthand notation for minterms of 3 variables
6 Shorthand notation for SOP expressions SOP ShorthandShorthand notation for SOP expressionsF(A,B,C) = A' B C + A B' C' + A B' C + A B C' + A B C= m(3,4,5,6,7)F(A,B,C)' = A' B' C' + A' B' C + A' B C'= m(0,1,2)
7 POS Expressions F = (A + B +C) (A + B + C') • (A + B' + C) Sample truth tableA B C FF1F = (A + B +C) (A + B + C')• (A + B' + C)F' = (A + B' +C') (A' + B + C)• (A' + B + C') (A' + B' + C)• (A' + B' + C')
8 Notion of a MaxtermA Maxterm is 0 for exactly 1 row of the truth tableA Maxterm is the complement of the corresponding minterm of that rowA Maxterm is a sum (OR) of complements of all the row literalsA truth table function can be represented by its 0s; that is, by a product (ANDing) of Maxterms
9 Shorthand notation for Maxterms of 3 variables # A B C MaxtermsA + B + C = M0A + B + C' = M1A + B' + C = M2A + B' + C' = M3A' + B + C = M4A' + B + C' = M5A' + B' + C = M6A' + B' + C' = M7Shorthand notation for Maxterms of 3 variables
10 Shorthand notation for POS expressions POS ShorthandShorthand notation for POS expressionsA B C FF1F(A.B.C) = (A + B +C) • (A + B + C') (A + B' + C) = M(0,1,2)F(A,B,C)' = (A + B' +C') • (A' + B + C) (A' + B +C') • (A' + B' + C) (A' + B' + C')= M(3,4,5,6,7)
13 Incomplete Functions Example: Don’t cares Outputs associated with inputs that can be ignoredThese inputs CANNOT happen in a good designAssign logic values to these outputs to simplify circuitsExample:Binary Coded Decimal (BCD)
14 BCD Numbers# A B C Dx Ax Bx Cx Dx Ex FDecimalnumbersNot decimal!Not a valid input!Cannot happen!
16 Logic MinimizationMinimization is the process of reducing a complex logic expression or equation into a simpler form with fewer terms by removing redundancies and terms having no effect on the output.This is similar to simplifying and reducing complex algebraic expressions by combining and collecting like terms.As in algebraic reduction, rules must be followed that guarantee the value of the expression is not changed by the simplification.
17 Used to measure complexity Variables & LiteralsUsed to measure complexityVariable: each input variable or its complement in an expressionLiteral: each appearance of a variable or its complement in an expressionExampleZ = A B C + A B + A B C + B CVariables = A, B, CLiterals = = 10
18 Rationale for Logic Minimization Reduce complexity of the gate level implementation• reduce number of literals (gate inputs)• reduce number of gates• reduce number of levels of gatesfewer inputs implies faster gates in some technologiesfan-ins (number of gate inputs) are limited in some technologiesfewer levels of gates implies reduced signal propagation delaysminimum delay configuration typically requires more gatesnumber of gates (or gate packages) influences manufacturing costs
19 Tradeoffs Time and Space Trade-Offs Traditional methods: reduce delay at expense of adding gatesNew methods:trade off between increased circuit delay and reduced gate countPower Savings
21 Apply the laws and theorems to simplify Boolean equations Minimization ExampleApply the laws and theorems to simplify Boolean equationsExample: full adder's carry out functionCout = A' B Cin + A B' Cin + A B Cin' + A B CinSimplify by minimizing the number termsApply: Laws & Theorems 3 and 9, or 1D, 3, 5 and 8
22 Simplifying Equations Example: full adder's carry out functionCout = A' B Cin + A B' Cin + A B Cin' + A B CinAlternative= A' B Cin + A B' Cin + A B Cin' + A B Cin + A B Cin= (A' + A) B Cin + A B' Cin + A B Cin' + A B Cin= (1) B Cin + A B' Cin + A B Cin' + A B Cin= B Cin + A B' Cin + A B Cin' + A B Cin + A B Cin= B Cin + A (B' + B) Cin + A B Cin' + A B Cin= B Cin + A (1) Cin + A B Cin' + A B Cin= B Cin + A Cin + A B (Cin' + Cin)= B Cin + A Cin + A B (1)= B Cin + A Cin + A B[1D][1D][1D]NOTE: Minimization is just an exercise in applying laws of Boolean Algebralearnt earlier!
23 Do Activity #2 Now For Next Class: Due: End of Class Today RETAIN THE LAST PAGE (#3)!!For Next Class:Bring Randy Katz TextbookRequired Reading:Sec & 2.3 (omit 2.3.6) of KatzThis reading is necessary for getting points in the Studio Activity!