1. S. E. Thompson EEL 6935 Today’s Subject Continue on some basics on single-wall CNT---- chiral length, angle and band gap; Other properties of CNT; Device applications; Growth of CNT; Si nanowires; Other nanowires; Growth Challenges.

2. S. E. Thompson EEL 6935 2 “Roll” Carbon Nanotube from Graphene C h = n a 1 + m a 2  (n, m); (n, m are integers; 0  m  n). cos  = C h  a 1 / |C h ||a 1 |.

3. S. E. Thompson EEL 6935 3 Nanotube Chirality

4. S. E. Thompson EEL 6935 4 Examples of Band Structures One-dimensional energy dispersion relations for (a) armchair (5, 5), (b) zigzag (9, 0), and (c) zigzag (10, 0) carbon nanotubes.

5. S. E. Thompson EEL 6935 5 Bandgap of Semiconducting Tube

6. S. E. Thompson EEL 6935 6 ATM or STM Used to Determine Chirality (11,7)

7. S. E. Thompson EEL 6935 Multi-wall CNT TEM Image Multi Wall Tubes

8. S. E. Thompson EEL 6935 8 Material Properties of CNT-continued

9. S. E. Thompson EEL 6935 Comparison of Other Materials to CNT MaterialYoung’s Modulus (GPa) (Modulus of Elasticity) Yield Strength (Gpa) Concrete, High Strength 300.04 ? Aluminum690.095 Titanium Alloy105-1200.73 Si170? Steel2000.69 Diamond1050-1200? SWCNT/MWCNT1050/1200 (same as diamond) ~200 Space Elevator CNT cable Super strong, light weight

10. S. E. Thompson EEL 6935 10 Material Properties of CNT-continued

11. S. E. Thompson EEL 6935 11 Electronic Applications CNT transistor

12. S. E. Thompson EEL 6935 Demonstration of CNT Memory Design http://www.nantero.com/index.html Applied charge make CNT ribbons bend down to touch the substrate or bend up back to its original state. Ribbon-up gives 'zero' and ribbon-down is 'one'.

13. S. E. Thompson EEL 6935 Structure 13 Fabricated on a silicon wafer, CNT ribbons are suspended 100 nanometers above a carbon substrate layer.

14. S. E. Thompson EEL 6935 Off-State 14

15. S. E. Thompson EEL 6935 On-State 15

16. S. E. Thompson EEL 6935 Read-Out 16

17. S. E. Thompson EEL 6935 17 Structural and Mechanical Applications

18. S. E. Thompson EEL 6935 18 CNT interconnect Lines

19. S. E. Thompson EEL 6935 19 Bottom-up Approach for CNT interconnects

20. S. E. Thompson EEL 6935 20 Sensors, NEMS Applications

21. S. E. Thompson EEL 6935 21 CNT-based Bio Sensors

22. S. E. Thompson EEL 6935 22

23. S. E. Thompson EEL 6935 23 Carbon Nanotube Growth

24. S. E. Thompson EEL 6935 24 Three Basic CNT Growth Methods A: Laser ablation; B: Arc discharge; C: Catalytic chemical vapor deposition (CCVD). All currently known methods consist of some variant of one of these approaches. A B C

25. S. E. Thompson EEL 6935 25 Bottom-up Growth of CNTs

26. S. E. Thompson EEL 6935 26 CNT Nanoelectrode Array

27. S. E. Thompson EEL 6935 27 Si Nanowires A Si nanowire MOSFET Ultrahigh piezoresistance of Si nanowire: sensor application, actuator, microscope cantilever, etc.

28. S. E. Thompson EEL 6935 28 Si Nanowire Growth Vapor-Liquid-Solid mechanism Si nanowire growth. Difference between Si nanowire and CNT: CNT is hollow, but Si nanowire is solid with crystalline core.

29. S. E. Thompson EEL 6935 29 Si Nano Wire Transistors

30. S. E. Thompson EEL 6935 30 Nanowire-based Vertical Gate Transistor

31. S. E. Thompson EEL 6935 31 ZnO Nanowires

32. S. E. Thompson EEL 6935 32 Challenges of Nanowire Growth

33. S. E. Thompson EEL 6935 33 Challenges of Nanowire Growth

34. S. E. Thompson EEL 6935 34 Nanoelectronics – Now or Never?" IEDM Evening Panel Discussion, December 14, Session 26: 8:00 p.m. Continental Ballroom 6-9 Moderator: Mark Lundstrom, Purdue University "Nanoelectronics – Now or Never?" Traditional 'top-down' microelectronics has become nanoelectronics with device dimensions comparable to those being explored in the new field of ëbottom-up' nano- and molecular electronics. We use the terms, top-down and bottom-up, in a very general sense. Top-down refers to a way of thinking and building that begins at the macro (continuum) scale and pushes to the nanoscale. Bottom-up refers to a way of thinking and building that begins at the atomistic level and builds up to the nanoscale. The top-down approach has already delivered silicon MOSFETs with channel lengths of ~ 5nm, but scaling down device dimensions with commensurate increase in device and system performance is increasingly challenging. Bottom-up technology has demonstrated molecular switches, nanotube and nanowire FET's, NDR and single electron devices, and ultra-dense memory prototypes. Is bottom-up nanotechnology ready to address the industry's challenges, or is it still long-term research with essentially unpredictable outcomes? This panel will debate the question of what the intersection of top-down and bottom- up electronics will mean to semiconductor technology of the future.