1. Carbon Nanotube Memory Yong Tang 04/26/2005 EE 666 Advanced Solid State Device

2. Outline Introduction to Carbon Nanotube Multi-Walled and Single-Walled Metallic and Semiconducting CNT Memories CNT FET Memory Bulky Ball NMD Bi-layer CNT RAM NRAM Summery

3. Two types of Carbon Nanotubes Multi-Walled CNT 2 Single-Walled CNT 1 Source:1. http://www.photon.t.u-tokyo.ac.jp/~maruyama/agallery/nanotubes. 2. "Helical microtubules of graphitic carbon", S. Iijima, Nature 354, 56 (1991)

4. Conductance of SWNT Carbon Nanotubes are intrinsically p-type semiconductors Interactions with metal electrodes Impurities induced during synthesis Interaction with oxygen in the atmosphere E EfEf

5. Two Categories Attempt to use various transistor like electrical properties of the nanotubes to emulate semiconductor memories Attempt to use the mechanical properties of nanotube to create bistable devices which can be used as memories.

6. Advantage Great potential for storage memory (116 Gb/cm 2 ) Small size offers faster switching speeds (100GHz ) and low power Easy to fabricate: standard semiconductor process Bistability gives well defined on & off states Nonvolatile nature: no need to refresh. Faster than SRAM, denser than DRAM, cheaper than flash memory. Have an almost unlimited life, resistant to radiation and magnetism—better than hard drive.

7. CNT FET Memory (1) Source: Adrian Bachtold, et al., “Logic Circuits with Carbon Nanotube Transistors”; Science; Vol 294; P-1317; November 9, 2001. RTL SRAM with CNT FETs. The storing of logical state, 0 and 1, are shown after the switch is opened.

8. CNT FET Memory (2) Semiconducting SWNT The reversibility of switching between the high conductance (ON) and low conductance (OFF) states within the SWCNT device both the ON and OFF state turned out to be stable over a period of at least 12 days. A threshold voltage shift of ~1.25 V. Source: J. B. Cui, et al. “Carbon nanotube memory devices of high charge storage stability”, 2002 Appl. Phys. Lett. atomic force microscopy image of the nanotube between electrode lines separated by ~150 nm.

9. CNT FET Memory (2) Memory effects observed at room temperature in an individual SWNT with a diameter of 2 nm. The bias voltage V bias is 10 mV. Source: J. B. Cui, et al. “Carbon nanotube memory devices of high charge storage stability”, 2002 Appl. Phys. Lett.

10. Problem Difficulty in fabricating precisely the nanotube circuitry. Properly contact to the electrodes. Better ways to manufacture are being researched. Contact resistance an issue with CNT devices. Theoretical limit of 6Kohms is high and will limit max. current.

11. NanoMemory Device A new carbon structure, the buckyball (C 60 ), was discovered in 1985. Source: M. Brehob “The Potential of Carbon-based Memory Systems”, IEEE 1999 A single-wall carbon nanotube would contain a charged ( K + ) buckyball. That buckyball will stick tightly to one end of the tube or the other.

12. NanoMemory Device Source: M. Brehob “The Potential of Carbon-based Memory Systems”, IEEE 1999 Assign the bit value of the device depending on which side of the tube the ball is. The result is a high-speed, non-volatile bit of memory.

13. NanoMemory Device In general the amount of voltage which needs to be applied depends upon the length of the capsule. A field of 0.1 volts/cm is sufficient to move the shuttle from one side of the tube to the other. Write speed: 20 picoseconds Source: M. Brehob “The Potential of Carbon-based Memory Systems”, IEEE 1999

14. Problem: How to read??? Three-wire detection Monitor conductance Hard to make middle wire connection Current detection Done with writing Use more shuttles Long capsule I

15. Bi-layer CNT RAM The clever thing is it combines both electronic and mechanical properties of single-wall nanotubes. Metallic nanotubes will bend toward a perpendicular semiconducting nanotube when electrically charged. When a metallic nanotube is one to two nanometers away from a semiconducting nanotube, the electrical resistance at the junction is low, creating an ON state. When the nanotubes are apart the resistance is much higher, creating an OFF state.

16. Structure Nonconductive spacers keep the higher nanotubes flat and raised above the lower level. These spacers can be between five and ten nanometers in height to separate the layers of nanotubes. These spacers must be tall enough to separate two layers of nanotubes from each other when both are at rest, yet short enough to allow small charges to attract and cause bends in the nanotubes. Source: Thomas Rueckes, et al.,”Carbon Nanotube Based Nonvolatile Random Access Memory for Molecular Computing”, SCIENCE, VOL 289, 7 JULY 2000.

17. Working Principle Bistable at NT crossing: Top NT Suspended: potential energy minimum Top NT contacting lower NT: van der Waals attraction Source: Thomas Rueckes, et al.,”Carbon Nanotube Based Nonvolatile Random Access Memory for Molecular Computing”, SCIENCE, VOL 289, 7 JULY 2000.

18. I-V Characteristic The touching of two nanotubes decreases resistance between the two wires dramatically, yielding different I-V characteristics. Experimental results show 10X higher resistance for off state Bit value can be sensed by determining resistance with low voltage applied at electrodes Once a bend is made, it will remain until opposite charges are placed at the intersection. Source: Thomas Rueckes, et al.,”Carbon Nanotube Based Nonvolatile Random Access Memory for Molecular Computing”, SCIENCE, VOL 289, 7 JULY 2000.

19. Problem The distance between the crossed wires has to be controlled fairly precisely: one to two nanometers Assemble and aligning a large number of these cross-wires. To make this pattern of nanotubes with precise control of distance is going to be the difficulty. Not yet a reliable way to produce separate sets of metallic and semiconducting nanotubes.

20. NRAM TM by Nantero Applied charge make CNT ribbons bend down to touch the substrate or bend up back to its original state. Ribbon-up gives 'zero' and ribbon-down is 'one'. Source: http://www.nantero.com/nram.html

21. Fabricated on a silicon wafer, CNT ribbons are suspended 100 nanometers above a carbon substrate layer. Structure

22. Source: http://www.nantero.com/nram.html Bistable State

23. Source: http://www.nantero.com/nram.html Bistable State

24. Source: http://www.nantero.com/nram.html Read-out

25. Source: http://www.nantero.com/nram.html Read-out

26. Problem A production chip would require millions of these ribbons manufactured cleanly and consistently and long enough to bend. Extremely difficult to align them.

27. Summary CNT Memory devices based on electrical and mechanical properties. Although have some problems, more advantages. A promising “Universal Memory”.