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FVTX Review Nov 2007 1 FVTX Review Homeworks. FVTX Review Nov 2007 2 When is Project Complete; how will it be determined?

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Presentation on theme: "FVTX Review Nov 2007 1 FVTX Review Homeworks. FVTX Review Nov 2007 2 When is Project Complete; how will it be determined?"— Presentation transcript:

1 FVTX Review Nov 2007 1 FVTX Review Homeworks

2 FVTX Review Nov 2007 2 When is Project Complete; how will it be determined?

3 FVTX Review Nov 2007 3 Project Complete Deliverables Active Strips, Noise hits/chip - Calibration system allows us to pulse each channel and make sure it is operational through to the PHENIX DAQ, calibration without pulse measures noise hits/chip Detector resolution, efficiency - Cosmic rays can measure this Radiation Length - Assured before final assembly, through engineering design controls DAQ deliverables - Automatically delivered as long as we stick with our current DAQ plan

4 FVTX Review Nov 2007 4 Project Complete Deliverables - Timeline Active Strips, Noise hits/chip - All of this can be tested initially prior to installation into PHENIX hall (summer 2010). Must be re-tested after installation (summer/fall 2010, depending on accessibility; part of commissioning plan) Detector resolution, efficiency - Can also test outside of PHENIX if we are so inclined (if, for instance, we cannot install when detector is ready). Would definitely re-test after installation, once noise issues have been addressed. Expect by late fall 2010 we can have these completed. Radiation Length - Assured before final assembly, through engineering design controls. Early in project DAQ deliverables - Automatically delivered as long as we stick with our current DAQ plan. Early in project.

5 FVTX Review Nov 2007 5 More Detail on Slow Controls Monitoring and Diagnostics

6 FVTX Review Nov 2007 6 Slow Controls, Monitoring and Diagnostics Global detector monitoring of temperature, water, etc. - Use (mature) PHENIX standard Adam monitoring system. Eric Mannel integrates our needs with PHENIX monitoring people (Paul Giannotti and co.) Detector environment monitoring, cooling system - Walter Sonheim/HYTEC in charge On-board monitoring of I/V/T - on-board chips identified which can monitor board status of I/V/T. ROC board specified to be able to send slow controls data either down the dedicated slow-controls fiber or integrate the data into the data-stream fiber.

7 FVTX Review Nov 2007 7 Cooling System: Monitor temperature of coolant Monitor the flow rate of coolant – by each coolant loop Dry Gas; Flow rate, humidity monitor, temperature Electrical: The commercial voltage systems for low and bias voltage have built in monitoring of voltage and current – standard industrial communication link. PHENIX system has standard monitoring interface – Adams system is currently fully implemented with in PHENIX. There is an on-going study to develop a fault analysis matrix to decide what the minimum number of channels needed to meet physics measurement requirement. Radiation level monitor – diode, remember the VTX/FVTX has the benefit of being shielded by the Central Magnet. Monitoring the bias current on the sensor (diode measurement). The FVTX subsystem group will develop a list of operational parameters to monitor during run periods, in conjunction with PHENIX on-line group. Slow Control Monitoring - Draft

8 FVTX Review Nov 2007 8 Workforce Breakdown

9 FVTX Review Nov 2007 9 Workforce by Institution

10 FVTX Review Nov 2007 10 WBS #InstitutionFY08FY09FY10 WBS 1.4CU3.12.83.3 LANL1.0 UNM1.21.2.6 WBS 1.5LANL2.652.652.75 WBS 1.7NMSU2.161.961.56 LANL.751.75 BNL.25.5.5 UNM.6 Workforce by WBS

11 FVTX Review Nov 2007 11 Pre-Production Q&A Details

12 FVTX Review Nov 2007 12 QA on sensors Visual inspection is first (under hi-magnification) many defects are obvious pits in the metallization defects in the passivation scratches or discoloration misalignment of metal to implant bond pad integrity polysilicon meander pattern

13 FVTX Review Nov 2007 13 QA on Sensors Depletion Voltage/Breakdown Voltage I/V test on sensor Total I/V measured on the guard ring Spy pads allow one to probe the dc characteristics of the individual implanted strips Full depletion voltage and breakdown voltage for each sensor Testing every strip for integrity depends on vendor selection C/V tests Curve of 1/C 2 has a characteristic shape, knee indicates depletion voltage Coupling capacitor value QA on test structures Measure polysilicon test structures Measure oxide breakdown voltage (typically > 50V)

14 FVTX Review Nov 2007 14 QA using external charge sources Response and charge-sharing characteristics 1064 nm laser diode scan Radioactive check sources, penetrating Beta, shallow, Alpha More extensive testing (requires a readout chip FSSR or FPHX) Coincidence cosmic ray telescope

15 FVTX Review Nov 2007 15 Equipment –Keithley 237 High Voltage Source Measure Unit –Keithley 617 Electrometer –HP4284A LCR Meter –Probestation: Alessi/Cascade REL-6100 semiautomatic –Software: UNM Custom on Labview –Laser: EG&G 1064nm –Picoprobe35 High Bandwidth High Impedance Probe –Tektronix 7254B 2.5GHz –Eichhorn Hausmann MX203-6-33 Contactless Wafer Gauge Test Instruments

16 FVTX Review Nov 2007 16 FNAL engineers have a simulator package that checks for design rules exceptions Input data patterns will be simulated through the design layout Design review incorporating FVTX personnel plus external reviewer (compatibility with PHENIX DAQ) Before submission to MOSIS FPHX

17 FVTX Review Nov 2007 17 Probe station QA Measure reference voltages and currents Noise Threshold Gain Pedestals Bench tests Performance under load Setup parameter sensitivity Stability and robustness at system level Controls interface and readout performance QA FPHX readout chip WBS 1.4.2

18 FVTX Review Nov 2007 18 FPHX QA tests with mini-DAQ 1.Test download of all registers, write into each download register and read it back (check for stuck bit) 2.Check resets and BCO counters for the chip (substantial amplitude pulse) If the sequence is properly timed, should get a specific BCO counter every time 3.Check “hit reject” and “send hit” registers can be set 4.Write the specific pattern into mask register and read a single pulse response. Checks the ability to mask the channels. 5.Run full calibration sequence on the chip. Be sure that every channel responses. Checks the correct strip number association. Verifies the noise level and threshold distribution of every channel. 6.Run calibration chain with ADC information. Checks correct ADC assignment

19 FVTX Review Nov 2007 19Jon S Kapustinsky, FVTX Review Nov 200724 QA HDI Visual inspection look for shorts and opens (some rework is possible) inspect bond pad quality alignment fiducial metrology Electronic tests continuity crosstalk measurements made with external test signals assemble prototype silicon HDI and FSSR chip (laser, source, calinput) assemble prototype sensor HDI and FVTX chip (laser source, cal input) WBS 1.4.3 Run spice simulation on the HDI Before pre-production submission Parameters measured on prototypes Signal integrity Crosstalk


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