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Lab 3 : Multiplier Overview.

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1 Lab 3 : Multiplier Overview

2 Lab 3 : Multiplier Create a 2 x 2 bits multiplier using:
K-Map Technique Array Technique Create a 4x4 bit multiplier using the 2x2 bit multiplier

3 Part A : K-Map Technique
Create a Truth Table for 2 bit “multiplier” and 2 bit “multiplicand” Input (Multiplier) = A1 and A0 Input (Multiplicand) = B1 and B0 Output = 4 bit = S3, S2, S1 and S0 (example) Using K-Map, obtain the boolean expression for each output. Draw the schematic diagram Transfer in Altera Max+Plus II using the Graphic Editor Submit : Truth Table, K-Map, Boolean Expression, Printed Schematic and Printed Waveform

4 Part A : K-Map Technique
Simulate your design Input A1 and A0 = fix value (repeat for 4 levels) Input B1 and B2 = counting sequence Study the waveform

5 Part A : K-Map Technique
Check and study the timing Analyzer for time delay Go to : Max+PlusII > Timing Analyzer

6 Part B : Array Technique
Create the 2x2 multiplier using Full ADDERS. Still remember the truth table for ADDERS?!!??

7 Full Adder Full Adder Truth Table S = X Å Y Å (C-in) X 1 Y S C-out
Inputs Outputs X 1 Y S C-out C-in C-out = XY + X(C-in) + Y(C-in) Full Adder X Y S C-in C-out S(X,Y, C-in) = S (1,2,4,7) C-out(x, y, C-in) = S (3,5,6,7)

8 Full Adder Full adder can also be implemented using 2 x ½ ADDER and one OR gate. (check in ref. book how it is done??)

9 Half Adder X 1 Y S C-out Half Adder Truth Table: S = X Å Y C-out = XY
1 Y S C-out Half Adder Truth Table: Inputs Outputs S = X Å Y C-out = XY X Y Sum S Half Adder X Y S C-OUT C-out

10 Part B : Array Technique
Submit your drawings of full adders and its truth table, your printed schematic, and waveform (same input and as K-Map technique) Fill in the timing analyzer

11 K-Map Vs Array After Analyzing your timing and getting the time delay
NOW. Check your delay: K-Map = what is the delay? Array Technique = what is the delay? Why??? (Conclusion)

12 2 x 2 Multiplier using Array technique – The Concept
A1 A0 B1 B0 x C C A1B0 A0B0 + A1B1 A0B1 S3 S2 S1 S0

13 THE CHALLENGE Part C : 4 x 4 Multiplier
Design 4 x 4 bits multiplier using Array technique Use the Multiplier 2x2 symbols and full adders which u have created. Hints : Look back at the concept of 2x2 multiplier. Take the same step.

14 Part C : 4 x 4 Multiplier Simulate your waveform
Submit your printed schematic diagram and waveform

15 Max+PlusII Tips Bus line A[3..0] A3 A2 A1 A0

16 Part C : 4 x 4 Multiplier Extra Activity
Download your 4x4 multiplier to UP2 board using FPGA (Flex10K) Pin Configuration to input (use flex switch 1-8) Pin Configuration to output (use flex digit 1 & 2 ) 4x4 Multiplier (your design) Tenth & Unit Segment Decoder 7447 BCD to 7Seg a - g A0 A1 A2 A3 B0 B1 B2 B3

17 Do first thing first Important? Urgent?
THANK YOU Do first thing first Important? Urgent?


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