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PIC Architecture: Background Microprocessor: ÕRequires ‘external’ support hardware ÕE.g., External RAM, ROM, Peripherals. Microcontroller: ÕVery little.

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Presentation on theme: "PIC Architecture: Background Microprocessor: ÕRequires ‘external’ support hardware ÕE.g., External RAM, ROM, Peripherals. Microcontroller: ÕVery little."— Presentation transcript:

1 PIC Architecture: Background Microprocessor: ÕRequires ‘external’ support hardware ÕE.g., External RAM, ROM, Peripherals. Microcontroller: ÕVery little external support hardware. ÕMost RAM, ROM and peripherals on chip. Õ“Computer on a chip”, or “System on chip” (SOC) ÕE.g., PIC = Peripheral Interface Controller ÕFor example, PICs use: – Data memory (RAM): a small number of 8bit registers – Program memory (ROM): 12bit, 14bit or 16bit wide (in EPROM, FLASH, or ROM)

2 PIC Architecture: Background PICs and most Harvard chips are “RISC” ÕReduced Instruction Set Computer (RISC) ÕUsed in: SPARC, ALPHA, Atmel AVR, etc. ÕFew instructions (usually < 50) ÕOnly a few addressing modes ÕExecutes 1 instruction in 1 internal clock cycle (Tcyc) ÕExample: PIC16CXXX:MOVLW 0x55 1 word, 1 cycle 1100XX01010101

3 Example PIC: 12C508 Block Diagram

4 The PIC Family: Cores PICs come with 1 of 4 CPU ‘cores’: Õ12bit cores with 33 instructions: 12C50x, 16C5x Õ14bit cores with 35 instructions: 12C67x,16Cxxx Õ16bit cores with 58 instructions: 17C4x,17C7xx Õ‘Enhanced’ 16bit cores with 77 instructions: 18Cxxx

5 The PIC Family: Packages PICs come in a huge variety of packages: 8 pin DIPs, SOICs:12C50x (12bit) and 12C67x (14bit) 18pin DIPs, SOICs: 16C5X (12bit), 16Cxxx (14bit) 28pin DIPs, SOICs: 16C5X (12bit), 16Cxxx (14bit) 40pin DIPs, SOICs: 16Cxxx (14bit), 17C4x (16bit) 44 - 68pin PLCCs*:16Cxxx (14bit), 17C4x / 17Cxxx (16bit) * also TQFPs, etc.

6 The PIC Family: Speed PICs require a clock to work. ÕCan use crystals, clock oscillators, or even an RC circuit. ÕSome PICs have a built in 4MHz RC clock – Not very accurate, but requires no external components! ÕInstruction speed = 1/4 clock speed (T cyc = 4 * T clk ) ÕAll PICs can be run from DC to their maximum spec’d speed: 12C50x 4MHz 12C67x10MHz 16Cxxx20MHz 17C4x / 17C7xxx33MHz 18Cxxx40MHz

7 The PIC Family: Program Memory PIC program space is different for each chip. Some examples are: 12C508512 12bit instructions 16C71C1024 (1k) 14bit instructions 16F8778192 (8k) 14bit instructions 17C76616384 (16k) 16bit instructions

8 The PIC Family: Program Memory PICs have two different types of program storage: 1. EPROM (Erasable Programmable Read Only Memory) ÕNeeds high voltage from a programmer to program (~13V) ÕNeeds windowed chips and UV light to erase ÕNote: One Time Programmable (OTP) chips are EPROM chips, but with no window! ÕPIC Examples: Any ‘C’ part: 12C50x, 17C7xx, etc.

9 The PIC Family: Program Memory PICs have two different types of program storage: 2. FLASH ÕRe-writable (even by chip itself) ÕMuch faster to develop on! ÕFinite number of writes (~100k Writes) ÕPIC Examples: Any ‘F’ part: 16F84, 16F87x, 18Fxxx (future)

10 The PIC Family: Data Memory PICs use general purpose “file registers” for RAM (each register is 8bits for all PICs) Some examples are: 12C50825 Bytes RAM 16C71C36 Bytes RAM 16F877368 Bytes (plus 256 Bytes of nonvolatile EEPROM) 17C766902 Bytes RAM Don’t forget, programs are stored in program space (not in data space), so low RAM values are OK.

11 The PIC Family: Control Registers PICs use a series of “special function registers” for controlling peripherals and PIC behaviors. Some examples are: STATUSBank select bits, ALU bits (zero, borrow, carry) INTCONInterrupt control: interrupt enables, flags, etc. TRISTristate control for digital I/O: which pins are ‘floating’ TXREGUART transmit register: the next byte to transmit

12 The PIC Family: Peripherals Different PICs have different on-board peripherals Some common peripherals are: – Tri-state (“floatable”) digital I/O pins – Analog to Digital Converters (ADC) (8, 10 and 12bit, 50ksps) – Serial communications: UART (RS-232C), SPI, I 2 C, CAN – Pulse Width Modulation (PWM) (10bit) – Timers and counters (8 and 16bit) – Watchdog timers, Brown out detect, LCD drivers

13 PIC Peripherals: Ports (Digital I/O) All PICs have digital I/O pins, called ‘Ports’ – the 8pin 12C508 has 1 Port with 4 digital I/O pins – the 68pin 17C766 has 9 Ports with 66 digital I/O pins Ports have 2 control registers – TRISx sets whether each pin is an input or output – PORTx sets their output bit levels Most pins have 25mA source/sink (directly drives LEDs) WARNING: Other peripherals SHARE pins!

14 PIC Peripherals: ADCs Only available in 14bit and 16bit cores Fs (sample rate) < 54KHz Most 8bits, newer PICs have 10 or 12bits All are +/- 1LSB and are monotonic Theoretically higher accuracy when PIC is in sleep mode (less digital noise) Can generate an interrupt on ADC conversion done Multiplexed 3 (12C671) - 12 (17C7xxx) channel input – Must wait Tacq to charge up sampling capacitor (see datasheets)

15 PIC Peripherals: USART: UART Serial Communications Peripheral: Universal Synchronous/Asynchronous Receiver/Transmitter Only available in 14bit and 16bit cores Interrupt on TX buffer empty and RX buffer full Asynchronous communication: UART (RS-232C serial) – Can do 300bps - 115kbps – 8 or 9 bits, parity, start and stop bits, etc. – Outputs 5V so you need a RS232 level converter (e.g., MAX232)

16 PIC Peripherals: USART: USRT Synchronous communication: i.e., with clock signal SPI = Serial Peripheral Interface – 3 wire: Data in, Data out, Clock – Master/Slave (can have multiple masters) – Very high speed (1.6Mbps) – Full speed simultaneous send and receive (Full duplex) I 2 C = Inter IC – 2 wire: Data and Clock – Master/Slave (Single master only; multiple masters clumsy) – Lots of cheap I 2 C chips available; typically < 100kbps (For example, 8pin EEPROM chips, ADC, DACs, etc.)

17 PIC Peripherals: Timers Available in all PICs. 14+bit cores may generate interrupts on timer overflow. Some 8bits, some 16bits, some have prescalers Can use external pins as clock in/clock out (ie, for counting events or using a different F osc ) Warning: some peripherals share Timer resources

18 PIC Peripherals: CCP Modules Capture/Compare/PWM (CCP) 10bit PWM width within 8bit PWM period (frequency) – Enhanced 16bit cores have better bit widths Frequency/Duty cycle resolution tradeoff – 19.5KHz has 10bit resolution – 40KHz has 8bit resolution – 1MHz has 1bit resolution (makes a 1MHz clock!) Can use PWM to do DAC - See AN655 Capture counts external pin changes Compare will interrupt on when the timer equals the value in a compare register

19 PIC Peripherals: Misc. Sleep Mode: PIC shuts down until external interrupt (or internal timer) wakes it up. Interrupt on pin change: Generate an interrupt when a digital input pin changes state (for example, interrupt on keypress). Watchdog timer: Resets chip if not cleared before overflow Brown out detect: Resets chip at a known voltage level LCD drivers: Drives simple LCD displays Future: CAN bus, 12bit ADC, better analog functions VIRTUAL PERIPHERALS: – Peripherals programmed in software. UARTS, timers, and more can be done in software (but it takes most of the resources of the machine)

20 Low End: 12C508 8pin package (DIP, SO) 12bit core - 33 instructions 1us instruction time (Tclk = 4MHz) 512 12bit program memory 25 8bit data memory or registers (“File registers”) 2 level hardware stack (no interrupts) 5 GPIO pins, 1 input only (25mA source/sink) Features: Internal pullups, wake up on pin change, internal oscillator Peripherals: Timer, Watch Dog Timer $1.88(1), $1.25(100), $9.65(W)

21 Mid Range: 16F876 28pin package (DIP, SO) 14bit core - 35 instructions 200ns instruction time (Tclk = 20MHz) 8,092 14bit FLASH program memory 368 8bit data memory or registers (“File registers”) 256 8bit EEPROM (nonvolatile) data registers 8 level hardware stack (interrupts enabled) 22 GPIO (20mA source / 25mA 7sink) Peripherals: 5ch 10bit ADC, USART/I2C/SPI, 16bit & 8bit timers Features: Brown out detect, In-Circuit Debugger (ICD) $11.00(1), $5.89(100)

22 High End: 17C766 84pin PLCC package 16bit core - 58 instructions 121ns instruction time (Tclk = 33MHz) 16,384 16bit program memory 902 8bit data memory or registers 16 level hardware stack (priority interrupts) 66 GPIO (20mA source / 35mA sink) Features: 8x8 multiply, BOD, microprocessor mode Peripherals: – 2x 16bit + 2x 8bit timer, WDT, 2x USART, 4x CCP, – 12ch 10bit ADC, $20.25(1), $10.53(100), $18.38(W)

23 12C508, 16F876, 17C766 Uses 12C508 – Inexpensive controllers, glue logic, simple tasks – E.g., quadrature decoding, digital interfacing 16F876 – Multitasking programs, serial communication – E.g., Cheap data acquisition system and digital I/O system for PC off COM ports, data logging 17C766 – RTOS, low end DSP, communications, big moosey applications – E.g., FEC converter, Rocket Flight Computer, cheap FFT chip

24 Instruction Examples movlw 0xFF Move (“mov”) the number (“l” for “literal”) 0xFF - that’s 256 in decimal- into the working register (“w”). In other words, load W with the value 0xFF.

25 Instruction Examples movwf PORTA Move (“mov”) the working register (“w”) into the file register (“f”) named PORTA. In other words, load the register called PORTA with whatever number is in the W register.

26 Instruction Examples movfPORTA, W Move (“mov”) the the value of the file register (“f”) named PORTA into the working register (“w”). In other words, load W with the whatever number is in PORTA.

27 Assembly Format First column: Labels Second column: opcodes and assembler directives Third Columns & more: operands ; This is a comments since it starts with a “;” ; This program puts out a square wave on PORTA Pin 0 clrfPORTA; Clear PORTA register clrfTRISA; Make PORTA all outputs LoopbsfPORTA,0; Turn on PORTA Pin 0 nop; Match ‘goto’ delay nop; “ “ “ bcfPORTA,0; Turn off PORTA Pin 0 gotoLoop; If not zero, loop back

28 Branch Instruction All branches are “Bit Tests” All branches only skip one instruction ; Set EqualFlag if PORTA = PORTB bcfEqualFlag, 7; First, clear the flag movfPORTA, W; Move PORTA -> W subwfPORTB, W; W - PORTB -> W btfscSTATUS, Z; Check Z bit (see STATUS) bsfEqualFlag, 7; Ports equal; set flag

29 STATUS Register

30 Direct Addressing All file registers (RAM) are accessed by an address. This is called direct addressing. For example, movlw0xFF movwf0x06 loads W with FF, and then loads W into GPIO (address 0x06). Thankfully, we can use labels instead of addresses: GPIOequ0x06 movwfGPIO

31 Relative Addressing PCL = Low byte of the Program Counter Can be read and written. Writing to it sets the address of the next instruction to be executed. 12bit core 14bit core

32 Relative Addressing u Example of Relative Addressing (using a table): ; Here’s a simple lookup table which is called as a ; subroutine. Expects the table offset to be loaded in W. ; An example call looks like this: ;movlw0x04; Load W with 4 ;callTable; Call the table subroutine ;movwfResult; Store the result from the table TableaddwfPCL, W; Jump to (current PCL) + W retlw0x00; Return with 0x00 in W retlw0x23; Return with 0x23 in W retlw0x33; etc. retlw0x88

33 Indirect Addressing Load indirect address into FSR Reading/Writing to INDF acts on address stored in FSR Example code to clear 0x20 - 7F: movlw 0x20 movwf FSR loopclrfINDF incfFSR,F btfssFSR,7 gotoloop INDF 00h 04h 7Fh Register File FSR

34 Banking RAM in the PICs is banked, especially special function registers. Use the bank select commands to choose the bank. Either: bsfSTATUS, RP0 bcfSTATUS, RPO Or use the assembler directive: Banksel

35 Software Tips Destination bit determines W or F for result Look at data movement and re-structure Example: A + B -> A MOVFB,W ADDWFA,F 2 instructions MOVFB,W ADDWFA,F 2 instructions MOVFA,W ADDWFB,W MOVWFA 3 instructions MOVFA,W ADDWFB,W MOVWFA 3 instructions

36 Software Tips ; Define variable names (without bothering with ; absolute addresses) CBLOCK 0x20 ;Start of data space. Var1: 1 Var2: 1 Var16:2 ACCL: 1 ACCH: 1 ENDC ; You can always call one thing many names, Grasshopper. ACCA equ ACCL ;alias ACCL ACCB equ ACCH ;alias ACCH

37 Software Tips ; This routine multiplies W by tmp (8x8). Uses ; temporary register CntDwn and stores 16bit result ; in ACCH:ACCL. Mult clrf ACCL clrf ACCH clrf CntDown bsf CntDown,3 ;CntDown -> 8 bcf STATUS,C MSum rrf tmp,F btfsc STATUS,C addwf ACCH,F rrf ACCH,F rrf ACCL,F decfsz CntDown,F goto MSum return

38 Software Tips ;Save the current state on interrupt ;(NOTE: _W must map in both Banks - e.g. 7F/FF) Interruptmovwf _W swapf STATUS,W ;Move STATUS w/o changing it bcf STATUS,RP0 ;Switch to page 0 movwf _STATUS ;Save old status (swapped). swapf _STATUS,W ;Load old STATUS (& unswap) movwf STATUS ;also restores old page# swapf _W,F swapf _W,W retfie

39 Pitfalls! Bit tests will screw you up! Be careful! For example: movfRegister, W btfscSTATUS, Z gotoNZero Zero.. Nzero. (WRONG!)

40 Pitfalls! For all 12 and 14bit cores, the working register, “W”, can NOT be addressed. So: swapfW, W will not work! However, in the 17CXXX series you CAN address the working register (called WREG).

41 Pitfalls! Peripheral Pin sharing Many times pins share functions. E.g., a GPIO will share a pin with a UART module (say the TX line). You CAN’T use one pin for two functions! You must choose between them. Peripheral Resource Sharing Some resources require using the same resource. For example, some of the PWM modules use TMR2, which may also be used in the USART module.

42 Pitfalls! Read-Modify-Write problems CAN BE SERIOUS! (Uplink) BCF/BSF PORTn Does the following: – Reads in the PORTn byte – Clears/sets the bit – Write the whole byte back. – BUT! If something external pulls a different output pin low or high during the READ, the read in value will not be what you expect - WORSE, the WRITE will permanently change it that way. Solution: Use Shadowed I/O (Example: set PORTA Bit 0) bsf_PORTA, 0 movf_PORTA, W movwf PORTA

43 Pitfalls! Make sure you always set the correct BANK bits! bsfSTATUS, RP0 clrfTRISA bcfSTATUS, RPO is correct; but if you just do clrfTRISA you’ll actually execute: clrfPORTA

44 Programming PICs: ICSP In-Circuit Serial Programmability – Good for commercial design – Available for most PICS – Assemble boards, then program them Vpp = +13V Vdd = Operating Vdd Cons: Requires dual use on ICSP pins PIC16CXX PIC14CXXX PIC12CXXX MCLR/V PP V DD V PP V SS I/O 1Clock I/O 2 Data I/O

45 Home Task I/O LEDs A B C 1 2 3 4 5 6 0 0 0 0 0 0 0 0 0 0 1 Z 1 0 0 0 0 0 1 0 Z 0 1 0 0 0 0 Z 0 1 0 0 1 0 0 0 Z 1 0 0 0 0 1 0 0 0 Z 1 0 0 0 0 1 0 1 Z 0 0 0 0 0 0 1 0 0 1 0 0 1 0 1 0 0 1 0 1 0 1 0 0 0 0 1 1 1 0 0 0 1 0 1 0 0 0 1 0 0 0 1 1 0 1 0 1 1 0 0 0 1 1 0 0 0 0 1 0 1 1 1 1 0 0 0 0 0 0 A I/O B I/O C I/O PICmicro 1 2 3 4 5656 6 LEDs off only three pins!


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