1. Wing LDA CALICE Collaboration Meeting DESY Hamburg, 21. March 2013 André Welker Lennart Adam, Bruno Bauss, Volker Büscher, Reinhold Degele, Karl Heinz Geib, Sascha Krause, Yong Liu, Lucia Masetti, Phi Chau, Uli Schäfer, Rouven Spreckels, Stefan Tapprogge, Rainer Wanke

2. Read-out-chain André Welker, CALICE Collaboration Meeting, DESY, 21. March 2013 SiPMASIC detector interface digital analog HBU data- aggregator (LDA) clock- and control-card (CCC) SiPMASIC detector interface digital analog HBU control clock trigger data busy DAQ PC beam control Ethernet on-detector-electronicoff-detector-electronic Ethernet control, trigger, clock, busy 2 fan-out more LDAs

3. Read-out-chain André Welker, CALICE Collaboration Meeting, DESY, 21. March 2013 SiPMASIC detector interface digital analog HBU data- aggregator (LDA) clock- and control-card (CCC) SiPMASIC detector interface digital analog HBU control clock trigger data busy DAQ PC beam control Ethernet on-detector-electronicoff-detector-electronic Ethernet control, trigger, clock, busy 2 fan-out more LDAs

4. Position of the LDA 3 LDA integrated in the 10x10cm cableshaft: André Welker, CALICE Collaboration Meeting, DESY, 21. March 2013 HCAL- /TPC-cabelshaft with coolingpipes ECAL-cableshaft 110cm challenges: problems: LDA outside of the detector  96 cables in the cableshaft solution/problem: 110 cm PCB  timedelay between each layer (up to 5ns) solution: on-board-electronic regulates timing differences 10cm

5. Position of the LDA 3 LDA integrated in the 10x10cm cableshaft: André Welker, CALICE Collaboration Meeting, DESY, 21. March 2013 HCAL- /TPC-cabelshaft with coolingpipes ECAL-cableshaft 110cm challenges: problems: Pitch between the 48 layers depends on (18/23 mm for W/Fe) solution:  Smallest possible HDMI micro connector Now only - One Ethernet cable - One control cable in the detector 10cm Ethernet-Uplink Control cable CCC

6. Mechanic and flexibility: LDA with rigid-flex connections: central module right wing left wing 4André Welker, CALICE Collaboration Meeting, DESY, 21. March 2013 Active and Passive LDA consists of 4 parts: 1.Three passive PCBs: The 96 connectors are on these PCBs. 2.One active PCB: it is a daughter module for tests and fast repairs. rigid-flex connection

7. Wing-LDA The first PCB: 1. Wing with 17 HDMI-connectors routed: 5André Welker, CALICE Collaboration Meeting, Cambridge, Sep. 18, 2012 450mm old ideas

8. Wing-LDA The second PCB: 2. Center PCB with 12 HDMI-connectors: 6André Welker, CALICE Collaboration Meeting, Cambridge, Sep. 18, 2012 400mm DATA/BUSY TRIG/CLK/DATA DATA/BUSY TRIG/CLK/DATA old ideas

9. LDA Layout Passive PCB: 1. Wing with 32 HDMI connectors: 7 367,5mm André Welker, CALICE Collaboration Meeting, DESY, 21. March 2013 99mm

10. LDA Layout Passive PCB: 2. Central module with 32 HDMI connectors: 8 365mm André Welker, CALICE Collaboration Meeting, DESY, 21. March 2013 99mm

11. SD FPGA MARS HDMI-CCC RJ45 280mm 80mm LDA Layout Active PCB: 3. Daughter module with 4 FPGAs and a Mars module: André Welker, CALICE Collaboration Meeting, DESY, 21. March 20139

12. Active PCB: 3. FPGA daughter module 10 280mm Zynq André Welker, CALICE Collaboration Meeting, DESY, 21. March 2013 Mars-ZX3 LDA Peculiarity: -Manages 1100 signals and sends them over the Ethernet -Has a Zynq processor who -has implemented an Arm9 dual core (with Linux) -and one FPGA -Same module as CCC Data/BUSY Legend: Control/Trigger/Clock FPGA CCC-Connector Ethernet Data BUSY

13. 2 GeV beam May 2013 Testbeam (DESY) André Welker, CALICE Collaboration Meeting, DESY, 21. March 201311 DAQ PC data clock- and control card (CCC) beam control control - Next testbeam with 8 layers at the end of may control busy

14. LDA Status LDA collects parallel data from 96 detector layers and leads the clock to each of them without a timing delay 80% of the LDA design is finished Order the PCBs in 1 week Firmware will be finished in 1 month Software is finished Ready to readout two full ILD detector segments with 48 layers each 12André Welker, CALICE Collaboration Meeting, DESY, 21. March 2013

15. Integration of CCC and LDA 1.Read-out data and send slow control data from the HBU layers as before over USB, but integrate the CCC for clock, trigger and busy signals 2.Read-out data by USB but send slow control data, clock, busy, trigger over the CCC 3.Integrate the LDA for data read-out instead of the USB, without interference from us in the regular data acquisition 4.Firmware and software will be written by us, so we don‘t interrupt the manpower on the DIF side 13André Welker, CALICE Collaboration Meeting, DESY, 21. March 2013 Steps:

16. André Welker, CALICE Collaboration Meeting, DESY, 21. March 2013 Thank you for your attention!