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StreamBlade TM Architecture Introduction To The StreamBlade TM Architecture Rev 1.2.

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Presentation on theme: "StreamBlade TM Architecture Introduction To The StreamBlade TM Architecture Rev 1.2."— Presentation transcript:

1 StreamBlade TM Architecture Introduction To The StreamBlade TM Architecture Rev 1.2

2 StreamBlade TM Architecture 2 Contents Background Concept Technology Architecture Products Applications

3 StreamBlade TM Architecture 3 Background StreamBlade TM Architecture Goals: –Reduce the initial investment for signal processing solutions –Reduce the time to deliver signal processing solutions –Provide a path to scale signal processing solutions –Provide an open architecture application framework

4 StreamBlade TM Architecture 4 Initial Investment Getting that first “thread” through… –Signal Source –RF to IF –IF to Channels –Channels to Data –Data to Follow-on-Processor (FOP)

5 StreamBlade TM Architecture 5 COTS hardware available today… Mercury Pentek AST DRT DRS

6 StreamBlade TM Architecture 6 COTS operating systems available today… VxWorks MC/OS Windows Linux

7 StreamBlade TM Architecture 7 How much does a prototype system cost today? DRS Receiver VME….……..= $30,000.00 Mercury Quad G4 VME…….= $60,000.00 Slot One Controller VME…...= $5,000.00 VxWorks BSP for controller..= $15,000.00 VxWorks License……………= $25,000.00 C or C++ Compiler................= $4,000.00 Total = $139,000.00 (just to get started) Note: Workstation, Chassis, and other Items are not included above.

8 StreamBlade TM Architecture 8 Time to deliver today… Integrating multi-vendor products is time consuming Getting board support packages (BSPs) and development environments set up is time consuming Installing and learning to use new tools is time consuming Debugging embedded applications is time consuming

9 StreamBlade TM Architecture 9 How do we scale our prototype system today? Add DRS Receivers? Add Mercury QUAD G4 boards? How many slots are in the chassis? How many chassis do we need? Will the backplane width restrict scalability?

10 StreamBlade TM Architecture 10 What if we want to see COTS vendor source code today? Good Luck…

11 StreamBlade TM Architecture 11 Concept StreamBlade TM Architecture adopted these principles: –Keep It Simple Stupid (KISS) –Use proven technology –Simplify connectivity –Simplify development –Use plug and play components –Keep an eye on cost

12 StreamBlade TM Architecture 12 Remember “breadboard” prototypes? KISS Proven technology Simple connections Easy to build Plug and play Cheap

13 StreamBlade TM Architecture 13 It is not as easy to “breadboard” prototype today… Today functional blocks are implemented in hardware, software, and firmware Today the signals are higher frequency and more complicated Today the interfaces between functional blocks are higher speed and more complicated

14 StreamBlade TM Architecture 14 Technology StreamBlade TM Architecture leverages existing, proven, inexpensive, easy to use, scaleable, standards based technologies such as: –TCP/IP –Ethernet –FPGA –DSP

15 StreamBlade TM Architecture 15 TCP/IP Sockets based programming is well understood today Today the real-time processing can be pushed into DSP or FPGA material Inexpensive operating systems, such as Linux, can be used in embedded applications as configuration and control fabric TCP Offload Engines (TOEs) and protocols such as RDMA reduce host processor cycles required to transfer data

16 StreamBlade TM Architecture 16 Ethernet Real-time processing nodes can be connected by 10/100/1000 Ethernet and 10 Gig-E is just around the corner Ethernet will work over twisted pair or fiber interfaces Ethernet is inexpensive, available, and standards based Today just about every type of computer or peripheral has a Ethernet interface Today network switches provide real-time processing nodes with non-blocking bandwidth connectivity

17 StreamBlade TM Architecture 17 FPGA & DSP FPGA technology has advanced and is providing multi-million gate solutions FPGA technology is less expensive today Today FPGA manufacturers are providing Ethernet building blocks and DSPs as hard cores in FPGA products Today many companies such as RFEL develop FPGA cores to perform signal processing functions such as FFTs, filters, and digital drop receivers (DDRs) at reasonable cost

18 StreamBlade TM Architecture 18 Architecture FPGA Network Input Output FPGA TCP/IP based configuration control, status, and data distribution FPGAs contain DSPs Plug and play distributed solutions Scalability is not limited by chassis boundaries Combined hardware and Software solutions Socket interface Non-blocking Gigabit Ethernet switch

19 StreamBlade TM Architecture 19 Processes can be located anywhere on the network… Input Output = = Socket Interface Process or Application (software and/or hardware) Application Program Interface (API) Network Non-blocking Gigabit Ethernet switch

20 StreamBlade TM Architecture 20 Network based application framework… FPGA Network Input Output FPGA TCP/IP based configuration control, status, and data distribution FPGAs contain DSPs Plug and play distributed solutions Scalability is not limited by chassis boundaries Combined hardware and Software solutions Embedded socket based agent Non-blocking Gigabit Ethernet switch FPGA Application HW/SW API

21 StreamBlade TM Architecture 21 Most devices support the Ethernet standard… FPGA Control & Status Output Input NAS Server FPGA Non-blocking Gigabit Ethernet switch Network

22 StreamBlade TM Architecture 22 StreamBlade TM Signal Processing (Electrical I/O) Network FPGA InputOutput FormatDemodTune Non-blocking Gigabit Ethernet switch

23 StreamBlade TM Architecture 23 StreamBlade TM Signal Processing (Ethernet I/O) FPGA InputOutput FormatDemodTune Non-blocking Gigabit Ethernet switch Network

24 StreamBlade TM Architecture 24 StreamBlade TM Signal Processing (Hybrid I/O) FPGA Input Output FormatDemodTune Non-blocking Gigabit Ethernet switch Network

25 StreamBlade TM Architecture 25 StreamBlade TM Scalability Network Switch A Network Switch B FPGA Input Output Today Foundry and Cisco provide non-blocking Gigabit Ethernet switches with up to 500 ports FPGA

26 StreamBlade TM Architecture 26 Products FPGA Xilinx Virtex-4 FX60 Xilinx Virtex-4 FX60 SOE-4 1 Gig-E 40 ATA FPGA Xilinx Virtex-4 LX100 Xilinx Virtex-4 LX100 SOE-2-2V4 1 Gig-E 40 ATA FPGA Xilinx Virtex-4 FX60 Note: ESD is developing a family of StreamBlade TM Single Board Computers (SBCs). The SOE-4-PCI and SOE-2-2V4-PCI are the first to be developed. 4 channel Stream Offload Engine (SOE)2 channel Stream Offload Engine (SOE) with 2 Virtex-4 Application FPGAs SOE-2 boards are available with the following Xilinx Virtex-4 application FPGAs: LX(40, 60, 80, 100, 160), SX(55)

27 StreamBlade TM Architecture 27 Two Independent Stream Offload Engines (SOEs) PHY FPGA Virtex-4 FX60 DDR SDRAM ZBT SRAM DDR SDRAM ZBT SRAM 1 Gig-E 40 Data Each SEO TM is implemented by: –½ Xilinx Virtex-4 FX60; 8MB ZBT SRAM; 128MB DDR SDRAM –(10BaseT/100BaseTX/1000Base TX) PHY –RJ-45 Ethernet connector with link status LEDs –RS-232 Monitor Port; Status LEDs

28 StreamBlade TM Architecture 28 SOE Technology The Stream Offload Engine (SOE TM ) is at the core of the Embedded Systems Design, Inc. (ESD) StreamBlade TM family of single board computers. StreamBlade TM single board computers utilize ESD’s SOE TM technology to provide zero-copy, full TCP/IP offload, and 10/100/1000 Ethernet connectivity between the application FPGAs and external real-time streaming data processing nodes. ESD’s SOE TM technology acts to decouple real-time streaming data source and sink processing nodes allowing real-time processing jitter to occur without data loss. When necessary, it is possible to run data distribution service (DDS) source/sink agent software on the PPC405 inside the SOE TM.

29 StreamBlade TM Architecture 29 J1 J2 J7J9 SOE-4-PCI J6J8 J3 J4 PCICPLD FLASH J5 PHY FPGA Virtex-4 FX60 DDR SDRAM ZBT SRAM DDR SDRAM ZBT SRAM PHY FPGA Virtex-4 FX60 ZBT SRAM ZBT SRAM DDR SDRAM DDR SDRAM Local Bus U10 U1

30 StreamBlade TM Architecture 30 SOE-4-PCI

31 StreamBlade TM Architecture 31 P1 P2 P5 PHY CPLD FLASH PCI Application FPGA#1 Virtex-4 ZBT SRAM FPGA Virtex-4 FX60 DDR SDRAM ZBT SRAM Application FPGA#2 Virtex-4 P3P4 DDR SDRAM ZBT SRAM ZBT SRAM SOE-2-2V4-PCI Local Bus

32 StreamBlade TM Architecture 32 SOE-2-2V4-PCI

33 StreamBlade TM Architecture 33 Foundation Tools: ESD StreamBed TM firmware is provided with each board. The StreamBed TM firmware CD includes a Bootloader, Flash Burner, and StreamBlade TM Diagnostics. Developers may download and run applications, test StreamBlade TM hardware, and burn images to Flash via Ethernet, serial port, or the PCI bus. ESD StreamBed TM software is provided with each board. The StreamBed TM software CD includes executable Linux and Windows device drivers. The drivers provide the host computer, via the PCI bus, the ability to control and receive status from one or more StreamBlade TM single board computers. ESD StreamBed TM software comes complete with device driver documentation, driver source code, pre-compiled driver images, and driver build files for StreamBlade TM single board computers. Contact ESD for more information: www.ESD-StreamBed.com

34 StreamBlade TM Architecture 34 Application Development: A Xilinx Virtex-4 FX60 BSP is available from ESD. The BSP development CD comes complete with documentation, source code, pre- synthesized designs, and project files. Sample applications demonstrate how to interface user configurable I/O from a 40 Pin ATA connector with a Stream Offload Engine (SOE). Xilinx development tools and the Xilinx Embedded Development Kit (EDK) are available from Xilinx. Contact Xilinx for more information: www.Xilinx.com

35 StreamBlade TM Architecture 35 Full Stream Offload Engine (SOE) Plug-In Data Distribution Service (DDS) Conversion of configurable I/O Input to Data Distribution Format Conversion of Data Distribution Format to configurable I/O Output Equipment Control via 40pin ATA or RJ-45 connectors Network: Bridge, Monitor, and Test Software Based Radio Applications –Digital Drop Receiver (DDR); Demod; and Demux –Adaptive Beam Forming –Interference Mitigation; Direction Finding Protocol Processing; Filtering & Selection Data Generation; Data Recording; Data Playback Applications

36 StreamBlade TM Architecture 36 SOE-4-PCI Application Example StreamBlade TM SOE-4 PCI ATA Each SOE is implementing an embedded DDS Source/Sink Agent making the Gig-E interfaces DDS compliant. Each Gig-E interface may be carrying real-time streaming data channels with an aggregate rate exceeding 80 E1s with multi-casting enabled. ATA Other Vendor PCI Card Gig-E Bits DDS Network Gig-E (Data) Host (Control, Status, Config, Power)

37 StreamBlade TM Architecture 37 SOE-2-2V4-PCI Application Example A Other Vendor PCI Card StreamBladeTM SOE-2-2V4 (Using application FPGAs independently) PCI ATA DDS Network Gig-E Each SOE is implementing an embedded DDS Source/Sink Agent making the Gig-E interfaces DDS compliant. Each Gig-E interface may be carrying real-time streaming data channels with an aggregate rate exceeding 80 E1s with multi-casting enabled. (Data) Host (Control, Status, Config, Power)

38 StreamBlade TM Architecture 38 SOE-2-2V4-PCI Application Example B Other Vendor PCI Card StreamBlade TM SOE-2-2V4 (Using cross wired application FPGAs) PCI ATA DDS Network Gig-E In this application both application FPGAs are required to process the data from the other vendor card. The SOE is implementing an embedded DDS Source/Sink Agent making the Gig-E interface DDS compliant. The Gig-E interface may be carrying real-time streaming data channels with an aggregate rate exceeding 80 E1s with multi-casting enabled. Host (Control, Status, Config, Power) (Data)

39 StreamBlade TM Architecture 39 SOE-2-2V4-PCI Application Example C Other Vendor PCI Card StreamBlade TM SOE-2-2V4 (Using application FPGAs independently) PCI ATA DDS Network Other Vendor PCI Card ATA Each SOE is implementing an embedded DDS Source/Sink Agent making the Gig-E interfaces DDS compliant. Each Gig-E interface may be carrying real-time streaming data channels with an aggregate rate of 80 E1s. 16 E1s 4 E3s Gig-E Host (Control, Status, Config, Power) (Data)

40 StreamBlade TM Architecture 40 SOE-4 and SOE-2 Architecture Example FPGA FX60 SOE-4 FPGA Application SOE-2 FPGA FX60 Network ADC RX TUNE DEMOD DMOD

41 StreamBlade TM Architecture 41 SOE-2 Architecture Example Network ADC FPGA Application SOE-2 FPGA FX60 Format FPGA Application SOE-2 FPGA FX60 Demod FPGA Application SOE-2 FPGA FX60 Tune X X X X

42 StreamBlade TM Architecture 42 No longer limited by chassis boundaries… 48 Port Non-Blocking 1 Gigabit Ethernet Network Switch FPGA Application SOE-2 FPGA FX60 FPGA Application SOE-2 FPGA FX60 FPGA Application SOE-2 FPGA FX60 FPGA Application SOE-2 FPGA FX60 FPGA Application SOE-2 FPGA FX60 FPGA Application SOE-2 FPGA FX60 FPGA Application SOE-2 FPGA FX60 FPGA Application SOE-2 FPGA FX60 FPGA Application SOE-2 FPGA FX60 FPGA Application SOE-2 FPGA FX60 FPGA Application SOE-2 FPGA FX60 FPGA Application SOE-2 FPGA FX60 FOP The “Network” is the: Bus, Computer, and Signal Processing System… 12 Slot Passive PCI Backplane Chassis

43 StreamBlade TM Architecture 43 POC Contact Information Mark Wecht - President –mark.wecht@embedded-sys.commark.wecht@embedded-sys.com Jeff Clements – Vice President –jeff.clements@embedded-sys.comjeff.clements@embedded-sys.com Scott Wecht – Vice President Product & Research –scott.wecht@embedded-sys.comscott.wecht@embedded-sys.com

44 StreamBlade TM Architecture 44 Corporate Contact Information This material is the Copyright of Embedded Systems Design, Inc. 1996-2007. ESD, StreamBlade, StreamBed, StreamServer, StreamHunter, and Stream Offload Engine (SOE) are Trademarks. Other company and product names may be trademarks of their respective owners. Contact Embedded Systems Design, Inc. sales: www.Embedded-Sys.com www.ESD-StreamBlade.com Phone: (410) 712-7290 Embedded Systems Design, Inc. 6810 Deerpath Road Suite 300 Elkridge, Maryland 21075 USA


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