1. MSICT – RF Communication SoC POWER OPTIMIZED LC VCO & MIXER CO-DESIGN Daniel Götz, Milosz Sroka June 20th, 2006

2. INTRODUCTION PAPER’S IMPLEMENTATIONOUR IMPLEMENTATIONRESULTSCONCLUSION Power Optimized LC VCO & Mixer Co-design: by Byunghoo Jung, Shubha Bommalingaiahnapallya, and Ramesh Harjani University of Minnesota, Dept. of ECE Capacitively source degenerated buffer used as a negative resistance cell No need of cross-coupled scheme Reduced power consumption Mixer input capacitance incorporated into the degeneration capacitor

3. PAPER’S IMPLEMENTATION INTROOUR IMPLEMENTATIONRESULTSCONCLUSION General implementation steps (1): LC Tank-based VCO Design Parallel LC oscillator model Tank design for oscillation frequency Buffer sizing and parameters calculation Requirements of negative resistance Design of the VCO complete structure Parallel LC oscillator model Requirements of negative resistance Buffer sizing and parameters calculation Tank design for oscillation frequency

4. PAPER’S IMPLEMENTATION INTROOUR IMPLEMENTATIONRESULTSCONCLUSION General implementation steps (2): Mixer Design  Standard Gilbert cell design  Reduced noise figure, maximized conversion gain  Input impedance characteristics VCO-Mixer Co-Design  Incorporation of the mixer input impedance to the VCO structure.  Other linkage effects

5. OUR IMPLEMENTATION INTROPAPER’S IMPLEMENTATIONRESULTS Step 1/6: Tank design Estimation of the oscillation frequency  L, C  Calculation of the parasitic resistance of L  Graphically:  Approximation: Required negative resistance for compensation  Req CONCLUSION

6. OUR IMPLEMENTATION INTROPAPER’S IMPLEMENTATIONRESULTS Step 2/6: “Degenerated Negative Resistance Cell” Dimensioning of the degenerating cell  Cs, width, Ibias, VDD CONCLUSION

7. OUR IMPLEMENTATION INTROPAPER’S IMPLEMENTATIONRESULTS Step 3/6: Tank Re-design Calculation of the Ceq of the cell Re-design CONCLUSION

8. OUR IMPLEMENTATION INTROPAPER’S IMPLEMENTATIONRESULTS Step 4/6: Oscillation structure Tank biasing Pulse generation CONCLUSION

9. OUR IMPLEMENTATION INTROPAPER’S IMPLEMENTATIONRESULTS Step 5/6: Mixer design Standard Gilbert cell  Transistor dimensioning  R load  I bias Input impedance  R in series with C CONCLUSION

10. OUR IMPLEMENTATION INTROPAPER’S IMPLEMENTATIONRESULTSCONCLUSION Step 5/6: Mixer design

11. OUR IMPLEMENTATION INTROPAPER’S IMPLEMENTATIONRESULTS Step 6/6: Co-design Linkage  Mixer input impedance  Tank tuning (not necessary)  Linkage capacitance to eliminate DC offset CONCLUSION

12. OUR IMPLEMENTATION INTROPAPER’S IMPLEMENTATIONRESULTSCONCLUSION Step 6/6: Co-design

13. OUR IMPLEMENTATION INTROPAPER’S IMPLEMENTATIONRESULTSCONCLUSION Step 6/6: Co-design

14. RESULTS INTROPAPER’S IMPLEMENTATIONOUR IMPLEMENTATION VCO Transient analysis: Single endedDifferential output CONCLUSION

15. RESULTS INTROPAPER’S IMPLEMENTATIONOUR IMPLEMENTATION PSS and Pnoise analysis: CONCLUSION

16. INTROPAPER’S IMPLEMENTATIONOUR IMPLEMENTATIONRESULTS Comparison between paper and our implementation: Low power design could not be achieved because of, Different Technology (paper = 0.18µm, used = 0.35µm ) Not sufficient good inductors (Q, parasitic resistance) comparable PSS results Phase noise was realized not that good as in the paper. At 1GHz paper = -107dBc/Hz; our implementation = -52dBc/Hz Discovered Bottleneck of this design: Inductors; because provide mainly the parasitic resistance which should be compensated with the Buffer-Transistors.